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It's not the latency of the prediction, but to issue the speculative request directly to the main memory controller from the core. In modern multi-core SoCs, even a request generated inside the core may take several cycles to travel to the main memory controller depending on the on-chip network/datapath design. Please refer to the end of Sec. 7.2 and Sec. 8.4.3 in the paper.

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Answer selected by rahulbera
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