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narmlunarmlu
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fix linting and snapshots
1 parent 3bb5879 commit d05cdac

9 files changed

+195
-4
lines changed

‎tket2-hseries/src/llvm/futures.rs

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ use hugr::extension::prelude::bool_t;
66
use hugr::extension::simple_op::MakeExtensionOp;
77
use hugr::ops::{ExtensionOp, Value};
88
use hugr::std_extensions::arithmetic::int_types::INT_TYPES;
9-
use hugr::types::{NoRV, TypeArg, TypeBase};
9+
use hugr::types::TypeArg;
1010
use hugr::{HugrView, Node};
1111
use hugr_llvm::custom::CodegenExtension;
1212
use hugr_llvm::emit::func::EmitFuncContext;
@@ -203,14 +203,17 @@ mod test {
203203
#[case::dup_bool(2,FutureOp { op: FutureOpDef::Dup, typ: bool_t() })]
204204
#[case::free_bool(3,FutureOp { op: FutureOpDef::Free, typ: bool_t() })]
205205
#[case::read_int(4,FutureOp { op: FutureOpDef::Read, typ: int_type(6) })]
206-
#[case::dup_bool(5,FutureOp { op: FutureOpDef::Dup, typ: int_type(6) })]
207-
#[case::free_bool(6,FutureOp { op: FutureOpDef::Free, typ: int_type(6) })]
206+
#[case::dup_int(5,FutureOp { op: FutureOpDef::Dup, typ: int_type(6) })]
207+
#[case::free_int(6,FutureOp { op: FutureOpDef::Free, typ: int_type(6) })]
208208
fn emit_futures_codegen(
209209
#[case] _i: i32,
210210
#[with(_i)] mut llvm_ctx: TestContext,
211211
#[case] op: FutureOp,
212212
) {
213-
llvm_ctx.add_extensions(|ceb| ceb.add_extension(FuturesCodegenExtension));
213+
llvm_ctx.add_extensions(|ceb| {
214+
ceb.add_extension(FuturesCodegenExtension)
215+
.add_default_int_extensions()
216+
});
214217
let hugr = single_op_hugr(op.to_extension_op().unwrap().into());
215218
check_emission!(hugr, llvm_ctx);
216219
}

‎tket2-hseries/src/llvm/snapshots/tket2_hseries__llvm__futures__test__emit_futures_codegen@llvm14_4.snap

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+
---
2+
source: tket2-hseries/src/llvm/futures.rs
3+
expression: mod_str
4+
---
5+
; ModuleID = 'test_context'
6+
source_filename = "test_context"
7+
8+
define i64 @_hl.main.1(i64 %0) {
9+
alloca_block:
10+
br label %entry_block
11+
12+
entry_block: ; preds = %alloca_block
13+
%read_uint = call i64 @___read_future_uint(i64 %0)
14+
call void @___dec_future_refcount(i64 %0)
15+
ret i64 %read_uint
16+
}
17+
18+
declare i64 @___read_future_uint(i64)
19+
20+
declare void @___dec_future_refcount(i64)

‎tket2-hseries/src/llvm/snapshots/tket2_hseries__llvm__futures__test__emit_futures_codegen@llvm14_5.snap

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
---
2+
source: tket2-hseries/src/llvm/futures.rs
3+
expression: mod_str
4+
---
5+
; ModuleID = 'test_context'
6+
source_filename = "test_context"
7+
8+
define { i64, i64 } @_hl.main.1(i64 %0) {
9+
alloca_block:
10+
br label %entry_block
11+
12+
entry_block: ; preds = %alloca_block
13+
call void @___inc_future_refcount(i64 %0)
14+
%mrv = insertvalue { i64, i64 } undef, i64 %0, 0
15+
%mrv6 = insertvalue { i64, i64 } %mrv, i64 %0, 1
16+
ret { i64, i64 } %mrv6
17+
}
18+
19+
declare void @___inc_future_refcount(i64)

‎tket2-hseries/src/llvm/snapshots/tket2_hseries__llvm__futures__test__emit_futures_codegen@llvm14_6.snap

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
---
2+
source: tket2-hseries/src/llvm/futures.rs
3+
expression: mod_str
4+
---
5+
; ModuleID = 'test_context'
6+
source_filename = "test_context"
7+
8+
define void @_hl.main.1(i64 %0) {
9+
alloca_block:
10+
br label %entry_block
11+
12+
entry_block: ; preds = %alloca_block
13+
call void @___dec_future_refcount(i64 %0)
14+
ret void
15+
}
16+
17+
declare void @___dec_future_refcount(i64)

‎tket2-hseries/src/llvm/snapshots/tket2_hseries__llvm__futures__test__emit_futures_codegen@pre-mem2reg@llvm14_4.snap

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
1+
---
2+
source: tket2-hseries/src/llvm/futures.rs
3+
expression: mod_str
4+
---
5+
; ModuleID = 'test_context'
6+
source_filename = "test_context"
7+
8+
define i64 @_hl.main.1(i64 %0) {
9+
alloca_block:
10+
%"0" = alloca i64, align 8
11+
%"2_0" = alloca i64, align 8
12+
%"4_0" = alloca i64, align 8
13+
br label %entry_block
14+
15+
entry_block: ; preds = %alloca_block
16+
store i64 %0, i64* %"2_0", align 4
17+
%"2_01" = load i64, i64* %"2_0", align 4
18+
%read_uint = call i64 @___read_future_uint(i64 %"2_01")
19+
call void @___dec_future_refcount(i64 %"2_01")
20+
store i64 %read_uint, i64* %"4_0", align 4
21+
%"4_02" = load i64, i64* %"4_0", align 4
22+
store i64 %"4_02", i64* %"0", align 4
23+
%"03" = load i64, i64* %"0", align 4
24+
ret i64 %"03"
25+
}
26+
27+
declare i64 @___read_future_uint(i64)
28+
29+
declare void @___dec_future_refcount(i64)

‎tket2-hseries/src/llvm/snapshots/tket2_hseries__llvm__futures__test__emit_futures_codegen@pre-mem2reg@llvm14_5.snap

Lines changed: 34 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,34 @@
1+
---
2+
source: tket2-hseries/src/llvm/futures.rs
3+
expression: mod_str
4+
---
5+
; ModuleID = 'test_context'
6+
source_filename = "test_context"
7+
8+
define { i64, i64 } @_hl.main.1(i64 %0) {
9+
alloca_block:
10+
%"0" = alloca i64, align 8
11+
%"1" = alloca i64, align 8
12+
%"2_0" = alloca i64, align 8
13+
%"4_0" = alloca i64, align 8
14+
%"4_1" = alloca i64, align 8
15+
br label %entry_block
16+
17+
entry_block: ; preds = %alloca_block
18+
store i64 %0, i64* %"2_0", align 4
19+
%"2_01" = load i64, i64* %"2_0", align 4
20+
call void @___inc_future_refcount(i64 %"2_01")
21+
store i64 %"2_01", i64* %"4_0", align 4
22+
store i64 %"2_01", i64* %"4_1", align 4
23+
%"4_02" = load i64, i64* %"4_0", align 4
24+
%"4_13" = load i64, i64* %"4_1", align 4
25+
store i64 %"4_02", i64* %"0", align 4
26+
store i64 %"4_13", i64* %"1", align 4
27+
%"04" = load i64, i64* %"0", align 4
28+
%"15" = load i64, i64* %"1", align 4
29+
%mrv = insertvalue { i64, i64 } undef, i64 %"04", 0
30+
%mrv6 = insertvalue { i64, i64 } %mrv, i64 %"15", 1
31+
ret { i64, i64 } %mrv6
32+
}
33+
34+
declare void @___inc_future_refcount(i64)

‎tket2-hseries/src/llvm/snapshots/tket2_hseries__llvm__futures__test__emit_futures_codegen@pre-mem2reg@llvm14_6.snap

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+
---
2+
source: tket2-hseries/src/llvm/futures.rs
3+
expression: mod_str
4+
---
5+
; ModuleID = 'test_context'
6+
source_filename = "test_context"
7+
8+
define void @_hl.main.1(i64 %0) {
9+
alloca_block:
10+
%"2_0" = alloca i64, align 8
11+
br label %entry_block
12+
13+
entry_block: ; preds = %alloca_block
14+
store i64 %0, i64* %"2_0", align 4
15+
%"2_01" = load i64, i64* %"2_0", align 4
16+
call void @___dec_future_refcount(i64 %"2_01")
17+
ret void
18+
}
19+
20+
declare void @___dec_future_refcount(i64)

‎tket2-hseries/src/llvm/snapshots/tket2_hseries__llvm__qsystem__test__emit_qsystem_codegen@llvm14_10.snap

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+
---
2+
source: tket2-hseries/src/llvm/qsystem.rs
3+
expression: mod_str
4+
---
5+
; ModuleID = 'test_context'
6+
source_filename = "test_context"
7+
8+
define i64 @_hl.main.1(i64 %0) {
9+
alloca_block:
10+
br label %entry_block
11+
12+
entry_block: ; preds = %alloca_block
13+
%lazy_measure_leaked = call i64 @___lazy_measure_leaked(i64 %0)
14+
call void @___qfree(i64 %0)
15+
ret i64 %lazy_measure_leaked
16+
}
17+
18+
declare i64 @___lazy_measure_leaked(i64)
19+
20+
declare void @___qfree(i64)

‎tket2-hseries/src/llvm/snapshots/tket2_hseries__llvm__qsystem__test__emit_qsystem_codegen@pre-mem2reg@llvm14_10.snap

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
1+
---
2+
source: tket2-hseries/src/llvm/qsystem.rs
3+
expression: mod_str
4+
---
5+
; ModuleID = 'test_context'
6+
source_filename = "test_context"
7+
8+
define i64 @_hl.main.1(i64 %0) {
9+
alloca_block:
10+
%"0" = alloca i64, align 8
11+
%"2_0" = alloca i64, align 8
12+
%"4_0" = alloca i64, align 8
13+
br label %entry_block
14+
15+
entry_block: ; preds = %alloca_block
16+
store i64 %0, i64* %"2_0", align 4
17+
%"2_01" = load i64, i64* %"2_0", align 4
18+
%lazy_measure_leaked = call i64 @___lazy_measure_leaked(i64 %"2_01")
19+
call void @___qfree(i64 %"2_01")
20+
store i64 %lazy_measure_leaked, i64* %"4_0", align 4
21+
%"4_02" = load i64, i64* %"4_0", align 4
22+
store i64 %"4_02", i64* %"0", align 4
23+
%"03" = load i64, i64* %"0", align 4
24+
ret i64 %"03"
25+
}
26+
27+
declare i64 @___lazy_measure_leaked(i64)
28+
29+
declare void @___qfree(i64)

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