formated

ChippyPlus · ChippyPlus · commit b36b3359579d · 2024-11-13T19:14:53.000+02:00
diff --git a/src/main/kotlin/engine/execution/Execute.kt b/src/main/kotlin/engine/execution/Execute.kt
@@ -67,182 +67,224 @@ class Execute(val vm: Vm) {
 			"sleep" -> {
 				vm.misc.sleep(args[0] as RegisterType)
 			}
+
 			"ftoi" -> {
 				vm.xFloats.ftoi(args[0] as RegisterType, args[1] as RegisterType)
 			}
+
 			"itof" -> {
 				vm.xFloats.itof(args[0] as RegisterType, args[1] as RegisterType)
 			}
+
 			"xlit" -> {
 				vm.xFloats.xLit(
 					args[0] as RegisterType,
 					(args[1] as String).toDoubleOrFloatBasedOnDataType(vm, args[0] as RegisterType)
 				)
 			}
+
 			"xpow" -> {
 				vm.xFloats.xPow(args[0] as RegisterType, args[1] as RegisterType)
 			}
+
 			"xsub" -> {
 				vm.xFloats.xSub(args[0] as RegisterType, args[1] as RegisterType)
 			}
+
 			"xmul" -> {
 				vm.xFloats.xMul(args[0] as RegisterType, args[1] as RegisterType)
 			}
+
 			"xdiv" -> {
 				vm.xFloats.xDiv(args[0] as RegisterType, args[1] as RegisterType)
 			}
+
 			"xadd" -> {
 				vm.xFloats.xAdd(args[0] as RegisterType, args[1] as RegisterType)
 			}
+
 			"settype" -> {
 				vm.registers.registers[(args[0] as RegisterType)]!!.settype(args[1] as RegisterDataType)
 			}
+
 			"dealloc" -> {
 				vm.dataTransfer.dealloc(
 					memAddress = args[0] as RegisterType
 				)
 			}
+
 			"pow" -> {
 				vm.arithmetic.pow(
 					registerA = args[0] as RegisterType, registerB = args[1] as RegisterType
 				)
 			}
+
 			"help" -> {
 				vm.misc.help((args[0] as String))
 			}
+
 			"ret" -> {
 				return null
 			}
+
 			"inr" -> {
 				vm.dataTransfer.inr((args[0] as String).toRegisterType() ?: {
 					vm.errors.InvalidRegisterException(args[0] as String)
 				} as RegisterType)
 			}
+
 			"call" -> {
 				vm.libPc = vm.pc
 				vm.libExecute.execute(args[0].toString())
 			}
+
 			"emptyLine", "comment" -> {}
 			"gt" -> {
 				vm.arithmetic.gt(
 					operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType
 				)
 			}
+
 			"lt" -> {
-				//                    println(args.size)
 				vm.arithmetic.lt(
 					operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType
 				)
 			}
+
 			"str" -> {
 				vm.strings.str(args[0].toString().toRegisterType() ?: {
 					vm.errors.InvalidRegisterException(args[0] as String)
 				} as RegisterType, args[1].toString())
 			}
+
 			"swp" -> {
 				vm.dataTransfer.swp(
 					register1 = args[0] as RegisterType, register2 = args[1] as RegisterType
 				)
 			}
+
 			"add" -> {
 				vm.arithmetic.add(
 					registerA = args[0] as RegisterType, registerB = args[1] as RegisterType
 				)
 			}
+
 			"sub" -> {
 				vm.arithmetic.sub(
 					registerA = args[0] as RegisterType, registerB = args[1] as RegisterType
 				)
 			}
+
 			"mul" -> {
 				vm.arithmetic.mul(
 					registerA = args[0] as RegisterType, registerB = args[1] as RegisterType
 				)
 			}
+
 			"div" -> {
 				vm.arithmetic.div(
 					registerA = args[0] as RegisterType, registerB = args[1] as RegisterType
 				)
 			}
+
 			"mod" -> {
 				vm.arithmetic.mod(
 					registerA = args[0] as RegisterType, registerB = args[1] as RegisterType
 				)
 			}
+
 			"eq" -> {
 				vm.arithmetic.eq(
 					operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType
 				)
 			}
+
 			"lit" -> {
 				vm.dataTransfer.lit(source = args[0] as RegisterType, value = args[1] as Long)
 			}
+
 			"mov" -> {
 				vm.dataTransfer.mov(
 					source = args[0] as RegisterType, destination = args[1] as RegisterType
 				)
 			}
+
 			"jmp" -> {
 				vm.controlFlow.jmp(targetAddress = args[0] as Long - 1L)
 			}
+
 			"jz" -> {
 				vm.controlFlow.jz(
 					targetAddress = args[0] as Long - 1L
 				)
 			}
+
 			"jnz" -> {
 				vm.controlFlow.jnz(
 					targetAddress = args[0] as Long - 1L
 				)
 			}
+
 			"peek" -> {
 				vm.stackOperations.peek(destination = args[0] as RegisterType)
 			}
+
 			"pop" -> {
 				vm.stackOperations.pop(destination = args[0] as RegisterType)
 			}
+
 			"push" -> {
 				vm.stackOperations.push(registerType = args[0] as RegisterType)
 			}
+
 			"pushl" -> {
 				vm.stackOperations.pushl(registerType = args[0] as Long)
 			}
+
 			"store" -> {
 				vm.memory.store(
 					source = args[0] as RegisterType, destination = args[1] as RegisterType
 				)
 			}
+
 			"load" -> {
 				vm.memory.load(
 					memoryAddress = args[0] as RegisterType, destination = args[1] as RegisterType
 				)
 			}
+
 			"shl" -> {
 				vm.bitwise.shl(
 					operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType
 				)
 			}
+
 			"shr" -> {
 				vm.bitwise.shr(
 					operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType
 				)
 			}
+
 			"and" -> {
 				vm.bitwise.and(
 					operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType
 				)
 			}
+
 			"not" -> {
 				vm.bitwise.not(operand = args[0] as RegisterType)
 			}
+
 			"or" -> {
 				vm.bitwise.or(operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType)
 			}
+
 			"xor" -> {
 				vm.bitwise.xor(
 					operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType
 				)
 			}
+
 			"syscall" -> {
 				vm.systemCall.execute(
 					callId = args[0] as RegisterType,
@@ -251,12 +293,15 @@ class Execute(val vm: Vm) {
 					s4 = args[3] as RegisterType
 				)
 			}
+
 			"prints" -> {
 				vm.ioAbstractions.prints()
 			}
+
 			"printr" -> {
 				vm.ioAbstractions.printr(register = args[0] as RegisterType)
 			}
+
 			else -> {
 				vm.errors.InvalidInstructionException(name)
 			}
diff --git a/src/main/kotlin/helpers/writeStringSpecInMemory.kt b/src/main/kotlin/helpers/writeStringSpecInMemory.kt
@@ -11,16 +11,16 @@ import data.memory.MemoryValue
  * @throws NotFreeMemoryException If the destination memory range is not free.
  */
 fun Helpers.writeStringSpecInMemory(string: String, destinationAddress: MemoryAddress) {
-    val allocMem = string.length
+	val allocMem = string.length
 
-    for (i in (destinationAddress.address!! until (destinationAddress.address + allocMem))) {
-        if (internalMemory.memory[MemoryAddress(i)] != MemoryValue(null)) {
-            errors.NotFreeMemoryException(i.toString())
-        }
-    }
+	for (i in (destinationAddress.address!! until (destinationAddress.address + allocMem))) {
+		if (internalMemory.memory[MemoryAddress(i)] != MemoryValue(null)) {
+			errors.NotFreeMemoryException(i.toString())
+		}
+	}
 
-    for ((index, i) in (destinationAddress.address until (destinationAddress.address + allocMem)).withIndex()) {
-        internalMemory.memory[MemoryAddress(i)] = MemoryValue(string[index].code.toLong())
-    }
-    internalMemory.memory[MemoryAddress(destinationAddress.address + allocMem)] = MemoryValue(0)
+	for ((index, i) in (destinationAddress.address until (destinationAddress.address + allocMem)).withIndex()) {
+		internalMemory.memory[MemoryAddress(i)] = MemoryValue(string[index].code.toLong())
+	}
+	internalMemory.memory[MemoryAddress(destinationAddress.address + allocMem)] = MemoryValue(0)
 }
diff --git a/src/main/kotlin/internals/instructions/stackOperations/pop.kt b/src/main/kotlin/internals/instructions/stackOperations/pop.kt
@@ -12,15 +12,15 @@ import helpers.toLong
  * @throws GeneralStackOperationsException If an error occurs during the pop operation (e.g. stack underflow).
  */
 fun StackOperations.pop(destination: RegisterType) = try {
-    registers.write(
-        intelNames[IntelRegisters.ENSF], true.toLong()
-    ) // Its above the next expr because the internal stack may throw its own errors
+	registers.write(
+		intelNames[IntelRegisters.ENSF], true.toLong()
+	) // Its above the next expr because the internal stack may throw its own errors
 
 
-    registers.write(
-        register = destination, value = internalStack.peek()
-    )
+	registers.write(
+		register = destination, value = internalStack.peek()
+	)
 } catch (_: Exception) {
-    errors.GeneralStackOperationsException("Pop")
+	errors.GeneralStackOperationsException("Pop")
 
 }
diff --git a/src/main/kotlin/internals/instructions/strings/strcpy.kt b/src/main/kotlin/internals/instructions/strings/strcpy.kt
@@ -18,13 +18,13 @@ import helpers.writeStringSpecInMemory
 
 @Deprecated("Moved into stdlib functions")
 fun Strings.strcpy(source: RegisterType, destination: RegisterType): Unit = try {
-    registers.write(intelNames[IntelRegisters.ENSF], true.toLong())
+	registers.write(intelNames[IntelRegisters.ENSF], true.toLong())
 
-    val string: String = helpers.readRegisterString(register = source)
-    val destinationAddress: Long = registers.read(register = destination)
-    helpers.writeStringSpecInMemory(
-        string = string, destinationAddress = MemoryAddress(address = destinationAddress)
-    )
+	val string: String = helpers.readRegisterString(register = source)
+	val destinationAddress: Long = registers.read(register = destination)
+	helpers.writeStringSpecInMemory(
+		string = string, destinationAddress = MemoryAddress(address = destinationAddress)
+	)
 } catch (_: Exception) {
-    errors.GeneralStringException(message = "Strcpy")
+	errors.GeneralStringException(message = "Strcpy")
 }
diff --git a/src/main/kotlin/internals/systemCalls/calls/exit.kt b/src/main/kotlin/internals/systemCalls/calls/exit.kt
@@ -13,6 +13,6 @@ import kotlin.system.exitProcess
  */
 @Suppress("RemoveExplicitTypeArguments")
 fun SystemCall.exit(s2: RegisterType) = call("exit") {
-    val exitCode: Long = registers.read(register = s2)
-    exitProcess(status = with<Long, Int>(receiver = exitCode) { return@with this.run<Long, Int>(block = Long::toInt) })
+	val exitCode: Long = registers.read(register = s2)
+	exitProcess(status = with<Long, Int>(receiver = exitCode) { return@with this.run<Long, Int>(block = Long::toInt) })
 }
diff --git a/src/main/kotlin/optimisations/VarRedundancy.kt b/src/main/kotlin/optimisations/VarRedundancy.kt

Original file line number	Diff line number	Diff line change
`@@ -67,182 +67,224 @@ class Execute(val vm: Vm) {`
`67`	`67`	`"sleep" -> {`
`68`	`68`	`vm.misc.sleep(args[0] as RegisterType)`
`69`	`69`	`}`
	`70`	`+`
`70`	`71`	`"ftoi" -> {`
`71`	`72`	`vm.xFloats.ftoi(args[0] as RegisterType, args[1] as RegisterType)`
`72`	`73`	`}`
	`74`	`+`
`73`	`75`	`"itof" -> {`
`74`	`76`	`vm.xFloats.itof(args[0] as RegisterType, args[1] as RegisterType)`
`75`	`77`	`}`
	`78`	`+`
`76`	`79`	`"xlit" -> {`
`77`	`80`	`vm.xFloats.xLit(`
`78`	`81`	`args[0] as RegisterType,`
`79`	`82`	`(args[1] as String).toDoubleOrFloatBasedOnDataType(vm, args[0] as RegisterType)`
`80`	`83`	`)`
`81`	`84`	`}`
	`85`	`+`
`82`	`86`	`"xpow" -> {`
`83`	`87`	`vm.xFloats.xPow(args[0] as RegisterType, args[1] as RegisterType)`
`84`	`88`	`}`
	`89`	`+`
`85`	`90`	`"xsub" -> {`
`86`	`91`	`vm.xFloats.xSub(args[0] as RegisterType, args[1] as RegisterType)`
`87`	`92`	`}`
	`93`	`+`
`88`	`94`	`"xmul" -> {`
`89`	`95`	`vm.xFloats.xMul(args[0] as RegisterType, args[1] as RegisterType)`
`90`	`96`	`}`
	`97`	`+`
`91`	`98`	`"xdiv" -> {`
`92`	`99`	`vm.xFloats.xDiv(args[0] as RegisterType, args[1] as RegisterType)`
`93`	`100`	`}`
	`101`	`+`
`94`	`102`	`"xadd" -> {`
`95`	`103`	`vm.xFloats.xAdd(args[0] as RegisterType, args[1] as RegisterType)`
`96`	`104`	`}`
	`105`	`+`
`97`	`106`	`"settype" -> {`
`98`	`107`	`vm.registers.registers[(args[0] as RegisterType)]!!.settype(args[1] as RegisterDataType)`
`99`	`108`	`}`
	`109`	`+`
`100`	`110`	`"dealloc" -> {`
`101`	`111`	`vm.dataTransfer.dealloc(`
`102`	`112`	`memAddress = args[0] as RegisterType`
`103`	`113`	`)`
`104`	`114`	`}`
	`115`	`+`
`105`	`116`	`"pow" -> {`
`106`	`117`	`vm.arithmetic.pow(`
`107`	`118`	`registerA = args[0] as RegisterType, registerB = args[1] as RegisterType`
`108`	`119`	`)`
`109`	`120`	`}`
	`121`	`+`
`110`	`122`	`"help" -> {`
`111`	`123`	`vm.misc.help((args[0] as String))`
`112`	`124`	`}`
	`125`	`+`
`113`	`126`	`"ret" -> {`
`114`	`127`	`return null`
`115`	`128`	`}`
	`129`	`+`
`116`	`130`	`"inr" -> {`
`117`	`131`	`vm.dataTransfer.inr((args[0] as String).toRegisterType() ?: {`
`118`	`132`	`vm.errors.InvalidRegisterException(args[0] as String)`
`119`	`133`	`} as RegisterType)`
`120`	`134`	`}`
	`135`	`+`
`121`	`136`	`"call" -> {`
`122`	`137`	`vm.libPc = vm.pc`
`123`	`138`	`vm.libExecute.execute(args[0].toString())`
`124`	`139`	`}`
	`140`	`+`
`125`	`141`	`"emptyLine", "comment" -> {}`
`126`	`142`	`"gt" -> {`
`127`	`143`	`vm.arithmetic.gt(`
`128`	`144`	`operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType`
`129`	`145`	`)`
`130`	`146`	`}`
	`147`	`+`
`131`	`148`	`"lt" -> {`
`132`		`- // println(args.size)`
`133`	`149`	`vm.arithmetic.lt(`
`134`	`150`	`operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType`
`135`	`151`	`)`
`136`	`152`	`}`
	`153`	`+`
`137`	`154`	`"str" -> {`
`138`	`155`	`vm.strings.str(args[0].toString().toRegisterType() ?: {`
`139`	`156`	`vm.errors.InvalidRegisterException(args[0] as String)`
`140`	`157`	`} as RegisterType, args[1].toString())`
`141`	`158`	`}`
	`159`	`+`
`142`	`160`	`"swp" -> {`
`143`	`161`	`vm.dataTransfer.swp(`
`144`	`162`	`register1 = args[0] as RegisterType, register2 = args[1] as RegisterType`
`145`	`163`	`)`
`146`	`164`	`}`
	`165`	`+`
`147`	`166`	`"add" -> {`
`148`	`167`	`vm.arithmetic.add(`
`149`	`168`	`registerA = args[0] as RegisterType, registerB = args[1] as RegisterType`
`150`	`169`	`)`
`151`	`170`	`}`
	`171`	`+`
`152`	`172`	`"sub" -> {`
`153`	`173`	`vm.arithmetic.sub(`
`154`	`174`	`registerA = args[0] as RegisterType, registerB = args[1] as RegisterType`
`155`	`175`	`)`
`156`	`176`	`}`
	`177`	`+`
`157`	`178`	`"mul" -> {`
`158`	`179`	`vm.arithmetic.mul(`
`159`	`180`	`registerA = args[0] as RegisterType, registerB = args[1] as RegisterType`
`160`	`181`	`)`
`161`	`182`	`}`
	`183`	`+`
`162`	`184`	`"div" -> {`
`163`	`185`	`vm.arithmetic.div(`
`164`	`186`	`registerA = args[0] as RegisterType, registerB = args[1] as RegisterType`
`165`	`187`	`)`
`166`	`188`	`}`
	`189`	`+`
`167`	`190`	`"mod" -> {`
`168`	`191`	`vm.arithmetic.mod(`
`169`	`192`	`registerA = args[0] as RegisterType, registerB = args[1] as RegisterType`
`170`	`193`	`)`
`171`	`194`	`}`
	`195`	`+`
`172`	`196`	`"eq" -> {`
`173`	`197`	`vm.arithmetic.eq(`
`174`	`198`	`operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType`
`175`	`199`	`)`
`176`	`200`	`}`
	`201`	`+`
`177`	`202`	`"lit" -> {`
`178`	`203`	`vm.dataTransfer.lit(source = args[0] as RegisterType, value = args[1] as Long)`
`179`	`204`	`}`
	`205`	`+`
`180`	`206`	`"mov" -> {`
`181`	`207`	`vm.dataTransfer.mov(`
`182`	`208`	`source = args[0] as RegisterType, destination = args[1] as RegisterType`
`183`	`209`	`)`
`184`	`210`	`}`
	`211`	`+`
`185`	`212`	`"jmp" -> {`
`186`	`213`	`vm.controlFlow.jmp(targetAddress = args[0] as Long - 1L)`
`187`	`214`	`}`
	`215`	`+`
`188`	`216`	`"jz" -> {`
`189`	`217`	`vm.controlFlow.jz(`
`190`	`218`	`targetAddress = args[0] as Long - 1L`
`191`	`219`	`)`
`192`	`220`	`}`
	`221`	`+`
`193`	`222`	`"jnz" -> {`
`194`	`223`	`vm.controlFlow.jnz(`
`195`	`224`	`targetAddress = args[0] as Long - 1L`
`196`	`225`	`)`
`197`	`226`	`}`
	`227`	`+`
`198`	`228`	`"peek" -> {`
`199`	`229`	`vm.stackOperations.peek(destination = args[0] as RegisterType)`
`200`	`230`	`}`
	`231`	`+`
`201`	`232`	`"pop" -> {`
`202`	`233`	`vm.stackOperations.pop(destination = args[0] as RegisterType)`
`203`	`234`	`}`
	`235`	`+`
`204`	`236`	`"push" -> {`
`205`	`237`	`vm.stackOperations.push(registerType = args[0] as RegisterType)`
`206`	`238`	`}`
	`239`	`+`
`207`	`240`	`"pushl" -> {`
`208`	`241`	`vm.stackOperations.pushl(registerType = args[0] as Long)`
`209`	`242`	`}`
	`243`	`+`
`210`	`244`	`"store" -> {`
`211`	`245`	`vm.memory.store(`
`212`	`246`	`source = args[0] as RegisterType, destination = args[1] as RegisterType`
`213`	`247`	`)`
`214`	`248`	`}`
	`249`	`+`
`215`	`250`	`"load" -> {`
`216`	`251`	`vm.memory.load(`
`217`	`252`	`memoryAddress = args[0] as RegisterType, destination = args[1] as RegisterType`
`218`	`253`	`)`
`219`	`254`	`}`
	`255`	`+`
`220`	`256`	`"shl" -> {`
`221`	`257`	`vm.bitwise.shl(`
`222`	`258`	`operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType`
`223`	`259`	`)`
`224`	`260`	`}`
	`261`	`+`
`225`	`262`	`"shr" -> {`
`226`	`263`	`vm.bitwise.shr(`
`227`	`264`	`operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType`
`228`	`265`	`)`
`229`	`266`	`}`
	`267`	`+`
`230`	`268`	`"and" -> {`
`231`	`269`	`vm.bitwise.and(`
`232`	`270`	`operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType`
`233`	`271`	`)`
`234`	`272`	`}`
	`273`	`+`
`235`	`274`	`"not" -> {`
`236`	`275`	`vm.bitwise.not(operand = args[0] as RegisterType)`
`237`	`276`	`}`
	`277`	`+`
`238`	`278`	`"or" -> {`
`239`	`279`	`vm.bitwise.or(operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType)`
`240`	`280`	`}`
	`281`	`+`
`241`	`282`	`"xor" -> {`
`242`	`283`	`vm.bitwise.xor(`
`243`	`284`	`operand1 = args[0] as RegisterType, operand2 = args[1] as RegisterType`
`244`	`285`	`)`
`245`	`286`	`}`
	`287`	`+`
`246`	`288`	`"syscall" -> {`
`247`	`289`	`vm.systemCall.execute(`
`248`	`290`	`callId = args[0] as RegisterType,`
`@@ -251,12 +293,15 @@ class Execute(val vm: Vm) {`
`251`	`293`	`s4 = args[3] as RegisterType`
`252`	`294`	`)`
`253`	`295`	`}`
	`296`	`+`
`254`	`297`	`"prints" -> {`
`255`	`298`	`vm.ioAbstractions.prints()`
`256`	`299`	`}`
	`300`	`+`
`257`	`301`	`"printr" -> {`
`258`	`302`	`vm.ioAbstractions.printr(register = args[0] as RegisterType)`
`259`	`303`	`}`
	`304`	`+`
`260`	`305`	`else -> {`
`261`	`306`	`vm.errors.InvalidInstructionException(name)`
`262`	`307`	`}`
Original file line number	Diff line number	Diff line change
`@@ -13,6 +13,6 @@ import kotlin.system.exitProcess`
`13`	`13`	`*/`
`14`	`14`	`@Suppress("RemoveExplicitTypeArguments")`
`15`	`15`	`fun SystemCall.exit(s2: RegisterType) = call("exit") {`
`16`		`- val exitCode: Long = registers.read(register = s2)`
`17`		`- exitProcess(status = with<Long, Int>(receiver = exitCode) { return@with this.run<Long, Int>(block = Long::toInt) })`
	`16`	`+ val exitCode: Long = registers.read(register = s2)`
	`17`	`+ exitProcess(status = with<Long, Int>(receiver = exitCode) { return@with this.run<Long, Int>(block = Long::toInt) })`
`18`	`18`	`}`