Overrun support

#43

Author: MasterPlayer

src_hw/axi_adxl345.sv

@@ -225,7 +225,7 @@ module axi_adxl345 #(
     logic                      out_awfull                 ;
 
     logic [                         7:0] version_major        = 8'h01                   ; // read only,
-    logic [                         7:0] version_minor        = 8'h0C                   ; // read only,
+    logic [                         7:0] version_minor        = 8'h0D                   ; // read only,
     logic [                         6:0] i2c_address          = DEFAULT_DEVICE_ADDRESS  ; // reg[0][14:8]
     logic                                link_on              = 1'b0                    ;
     logic                                on_work              = 1'b0                    ; // reg[0][4]
@@ -258,6 +258,7 @@ module axi_adxl345 #(
     logic has_inact_intr;
     logic has_ff_intr;
     logic has_wm_intr;
+    logic has_ovrrn_intr;
 
     logic [5:0] entries = '{default:0};
 
@@ -311,6 +312,13 @@ module axi_adxl345 #(
             has_wm_intr = 1'b0;
     end 
 
+    always_comb begin : has_ovrrn_intr_proc
+        if (int_source_reg[0] & int_enable_reg[0])
+            has_ovrrn_intr = 1'b1;
+        else 
+            has_ovrrn_intr = 1'b0;
+    end 
+
 
     always_comb begin 
 
@@ -718,7 +726,7 @@ module axi_adxl345 #(
                         if (has_dataready_intr | has_ff_intr)
                             current_state <= TX_WRITE_INTR_DATA_PTR_ST;
                         else
-                            if (has_wm_intr)
+                            if (has_wm_intr | has_ovrrn_intr)
                                 current_state <= TX_WRITE_WM_FIFO_STS_PTR_ST;
                             else     
                                 current_state <= IDLE_ST;
@@ -788,8 +796,6 @@ module axi_adxl345 #(
                         end 
                     end  
 
-
-
                 CHECK_INTR_DEASSERT: 
                     if (ADXL_INTERRUPT) 
                         current_state <= INT_PROCESSING_ST;
@@ -1424,7 +1430,7 @@ module axi_adxl345 #(
             8'h05    : reg_data_out_cfg <= write_transactions;
             8'h06    : reg_data_out_cfg <= read_transactions;
             8'h07    : reg_data_out_cfg <= CLK_PERIOD;
-            8'h08    : reg_data_out_cfg <= {24'h0, sample_address};
+            8'h08    : reg_data_out_cfg <= {23'h0, has_ovrrn_intr, sample_address};
             8'h09    : reg_data_out_cfg <= '{default:0}; // reserved
             8'h0a    : reg_data_out_cfg <= '{default:0}; // reserved
             8'h0b    : reg_data_out_cfg <= '{default:0}; // reserved
@@ -1789,7 +1795,7 @@ module axi_adxl345 #(
         end else begin  
             case (current_state) 
                 RX_WM_DATA_ST: 
-                    if (S_AXIS_TVALID & has_wm_intr) begin 
+                    if (S_AXIS_TVALID & (has_wm_intr | has_ovrrn_intr)) begin 
                         sample_address <= sample_address + 1;
                     end 
 
@@ -1800,7 +1806,7 @@ module axi_adxl345 #(
     end 
 
     always_ff @(posedge CLK) begin 
-        if (S_AXIS_TVALID & has_wm_intr) begin 
+        if (S_AXIS_TVALID & (has_wm_intr | has_ovrrn_intr)) begin 
             register_samples[sample_address][7:0] <= S_AXIS_TDATA;
         end 
     end 

src_sw/overrun_intr/app.c

@@ -0,0 +1,121 @@
+#include <stdio.h>
+#include "platform.h"
+#include "xil_printf.h"
+#include "axi_adxl.h"
+#include <time.h>
+#include <xscugic.h>
+
+#include <xparameters.h>
+
+
+int scugic_initialize(XScuGic *ptr, axi_adxl* adxl_ptr);
+void adxl_intr_handler(void *callback);
+
+int main(){
+
+	init_platform();
+
+	axi_adxl adxl_device;
+	XScuGic gic;
+
+	axi_adxl_init(&adxl_device, 0x40030000, 0x40040000);
+
+	scugic_initialize(&gic, &adxl_device);
+
+	int status = axi_adxl_enable(&adxl_device, 0x53, 10);
+	if (status != ADXL_OK){
+		printf("[MAIN] : enable device return code [%d]\r\n", status);
+	}
+
+	status = axi_adxl_calibration(&adxl_device);
+	if (status != ADXL_OK){
+		printf("[MAIN] : calibration device return code [%d]\r\n", status);
+	}
+
+	status = axi_adxl_disable_requesting(&adxl_device);
+	if (status != ADXL_OK){
+		xil_printf("[MAIN] : disable requests return code : [%d]\r\n", status);
+		return 0;
+	}
+
+	axi_adxl_set_int_map(&adxl_device, OVERRUN, 0x00);
+	axi_adxl_set_fifo_samples(&adxl_device, 0x1F);
+	axi_adxl_set_fifo_mode(&adxl_device, FIFO);
+	axi_adxl_int_enable(&adxl_device, OVERRUN);
+
+	volatile int change_mode = 0;
+
+	volatile int mode = 0;
+
+	while(1){
+		if (change_mode){
+
+			axi_adxl_change_bw(&adxl_device, mode);
+
+			change_mode = 0;
+		}
+
+	}
+
+	cleanup_platform();
+    return 0;
+}
+
+
+
+
+int scugic_initialize(XScuGic *ptr, axi_adxl* adxl_ptr){
+
+	int status = 0;
+
+    XScuGic_Config *cfg;
+
+    cfg = XScuGic_LookupConfig(XPAR_SCUGIC_0_DEVICE_ID);
+    if (!cfg){
+        return XST_FAILURE;
+    }
+
+    status = XScuGic_CfgInitialize(ptr, cfg, cfg->CpuBaseAddress);
+    if (status != XST_SUCCESS){
+        return XST_FAILURE;
+    }
+
+    XScuGic_SetPriorityTriggerType(ptr, XPAR_FABRIC_AXI_ADXL345_VHD_0_ADXL_IRQ_INTR, 0x00, 0x3);
+
+    status = XScuGic_Connect(ptr, XPAR_FABRIC_AXI_ADXL345_VHD_0_ADXL_IRQ_INTR, (Xil_InterruptHandler)adxl_intr_handler, adxl_ptr);
+    if (status != XST_SUCCESS){
+        return XST_FAILURE;
+    }
+
+    XScuGic_Enable(ptr, XPAR_FABRIC_AXI_ADXL345_VHD_0_ADXL_IRQ_INTR);
+
+    Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT, (Xil_ExceptionHandler)XScuGic_InterruptHandler, ptr);
+    Xil_ExceptionEnable();
+
+    return status ;
+}
+
+int iter = 0;
+
+void adxl_intr_handler(void *callback){
+	axi_adxl *ptr = (axi_adxl*)callback;
+
+	uint8_t entries = (adxl_dev_get_fifo_status(ptr->dev) & FIFO_STATUS_ENTRIES_MASK);
+
+	printf("[%2d]\r\n", entries);
+
+	for (int i = 0; i < entries; i++){
+		printf("\t[x] : %4d \t[y] : %4d \t [z] : %4d\r\n", ptr->cfg->axis[i].x, ptr->cfg->axis[i].y, ptr->cfg->axis[i].z);
+	}
+
+	adxl_cfg_ack(ptr->cfg);
+
+
+//	g_coord g;
+//
+//	axi_adxl_get_gravity(ptr, &g);
+//
+//	printf("[x] : %3.3f \t[y] : %3.3f \t [z] %3.3f\r\n", g.x, g.y, g.z);
+	return;
+}
+