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1 parent f9b2f77 commit f930d6eCopy full SHA for f930d6e
src/integrators/sdirk.jl
@@ -240,7 +240,7 @@ end
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if has_invW(f)
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A_mul_B!(vec(dz),W,vec(k)) # Here W is actually invW
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else
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- integrator.alg.linsolve(vec(dz),W,vec(k),new_W)
+ cache.linsolve(vec(dz),W,vec(k),new_W)
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end
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ndz = integrator.opts.internalnorm(dz)
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z .+= dz
@@ -271,7 +271,7 @@ end
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A_mul_B!(dz,W,k) # Here W is actually invW
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- integrator.alg.linsolve(vec(dz),W,vec(k),false)
+ cache.linsolve(vec(dz),W,vec(k),false)
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ndzprev = ndz
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