Skip to content

Commit 01acad0

Browse files
committed
Add xref to VHDL fork
1 parent 8216a9f commit 01acad0

File tree

2 files changed

+9
-1
lines changed

2 files changed

+9
-1
lines changed

README.md

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,4 +9,4 @@ Compile SystemRDL into a SystemVerilog control/status register (CSR) block.
99
For the command line tool, see the [PeakRDL project](https://peakrdl.readthedocs.io).
1010

1111
## Documentation
12-
See the [PeakRDL-regblock Documentation](http://peakrdl-regblock.readthedocs.io) for more details
12+
See the [PeakRDL-regblock Documentation](https://peakrdl-regblock.readthedocs.io) for more details

docs/index.rst

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,14 @@ The easiest way to use PeakRDL-regblock is via the `PeakRDL command line tool <
2525
peakrdl regblock atxmega_spi.rdl -o regblock/ --cpuif axi4-lite
2626
2727
28+
Looking for VHDL?
29+
-----------------
30+
This project generates SystemVerilog RTL. If you prefer using VHDL, check out
31+
the sister project: `PeakRDL-regblock-VHDL <https://peakrdl-regblock-vhdl.readthedocs.io>`_
32+
33+
The project aims to be a feature-equivalent fork of PeakRDL-regblock.
34+
35+
2836
Links
2937
-----
3038

0 commit comments

Comments
 (0)