@@ -286,6 +286,10 @@ module_param_array(Ratio_Boost, int, &Ratio_Boost_Count, \
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S_IRUSR|S_IWUSR|S_IRGRP|S_IROTH);
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MODULE_PARM_DESC(Ratio_Boost, "Turbo Boost Frequency ratios");
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+ static signed int Ratio_PPC = -1;
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+ module_param(Ratio_PPC, int, S_IRUSR|S_IWUSR|S_IRGRP|S_IROTH);
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+ MODULE_PARM_DESC(Ratio_PPC, "Target Performance ratio");
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+
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static signed short HWP_Enable = -1;
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module_param(HWP_Enable, short, S_IRUSR|S_IWUSR|S_IRGRP|S_IROTH);
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MODULE_PARM_DESC(HWP_Enable, "Hardware-Controlled Performance States");
@@ -21704,6 +21708,9 @@ static int CoreFreqK_User_Ops_Level_Up(INIT_ARG *pArg)
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}
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}
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Controller_Start(1);
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+
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+ RESET_ARRAY(Ratio_HWP, Ratio_HWP_Count, -1);
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+ Ratio_HWP_Count = 0;
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}
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if (Ratio_Boost_Count > 0)
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{
@@ -21741,6 +21748,9 @@ static int CoreFreqK_User_Ops_Level_Up(INIT_ARG *pArg)
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TurboBoost_Enable[0] = TurboBoost_Enable[1];
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}
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Controller_Start(1);
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+
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+ RESET_ARRAY(Ratio_Boost, Ratio_Boost_Count, -1);
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+ Ratio_Boost_Count = 0;
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}
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if (PUBLIC(RO(Proc))->ArchID != AMD_Family_0Fh)
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{
@@ -21764,7 +21774,7 @@ static int CoreFreqK_User_Ops_Level_Up(INIT_ARG *pArg)
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Controller_Stop(1);
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rc = Arch[PUBLIC(RO(Proc))->ArchID].ClockMod(&clockMod);
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- Controller_Start(0 );
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+ Controller_Start(1 );
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if (rc < RC_SUCCESS) {
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pr_warn("CoreFreq: " \
@@ -21782,7 +21792,24 @@ static int CoreFreqK_User_Ops_Level_Up(INIT_ARG *pArg)
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PState_FID = -1;
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}
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} /* else handled by function PerCore_AMD_Family_0Fh_PStates() */
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+ if (Ratio_PPC >= 0)
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+ {
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+ long rc = RC_SUCCESS;
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+
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+ if (Arch[PUBLIC(RO(Proc))->ArchID].ClockMod) {
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+ CLOCK_ARG clockMod={.Ratio = Ratio_PPC, .cpu = -1, .NC = CLOCK_MOD_TGT};
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+ Controller_Stop(1);
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+ rc = Arch[PUBLIC(RO(Proc))->ArchID].ClockMod(&clockMod);
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+ Controller_Start(0);
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+ } else {
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+ rc = -RC_UNIMPLEMENTED;
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+ }
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+ if (rc < RC_SUCCESS) {
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+ pr_warn("CoreFreq: 'Ratio_PPC' Execution failure code %ld\n", rc);
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+ }
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+ Ratio_PPC = -1;
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+ }
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return 0;
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}
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