AMD/Zen/UMC DIMM Ranks

[cyring]

Commit 398dc12 is changing the method to count the Ranks within DDR4 and DDR5.
It is based on the Chip Select (CS) and the count is incremented for each enabled CS.

[cyring]

• New RANK issue
  No temperature info on 9950X, "Unable to find AMD Northbridge id" #548 (comment)

                              Zen UMC  [14E0]
Controller #0                                               Single Channel
 Bus Rate  3200 MHz       Bus Speed 3200 MHz           DDR5 Speed 6400 MT/s

 Cha   CL  RCDr RCDw  RP  RAS   RC  RRDs RRDl FAW  WTRs WTRl  WR  clRR clWW
  #0   32   39   39   39  102  141    8   16   32    8   32   96    9   25
      CWL  RTP RdWr WrRd scWW sdWW ddWW scRR sdRR ddRR drRR drWW drWR drRRD
  #0   30   24   22    8    1   10   12    1   11   13    0    0    0    0
      REFI RFC1 RFC2 RFCsb RCPB RPPB BGS:Alt  Ban  Page  CKE  CMD  GDM  ECC
  #0 12463  943  512  416   0    0    ON OFF  R0W0   0    0   1T    ON   0
      MRD:PDA   MOD:PDA  WRMPR STAG PDM RDDATA WRD  WRL  RDL  XS   XP CPDED
  #0   45  32    45  32    24    7 0:F:0   20   6   18   36  975   24    0

 DIMM Geometry for channel #0
      Slot Bank Rank     Rows   Columns    Memory Size (MB)
       #0    16    3     32768      1024          12288    F5-6400J3239G16G
       #1    32    3     65536      1024          49152    F5-6400J3239G16G