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Update SN50v3-LB v1.1
1.Compatible with the newer version of the ASR6601 chip. 2.Change the 5V pin from open-drain mode to push-pull mode, in order to be compatible with hardware versions after LSN50 v3.3.
1 parent 32af737 commit de4b102

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9 files changed

+52
-38
lines changed

9 files changed

+52
-38
lines changed

Drivers/peripheral/inc/tremo_rcc.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -29,8 +29,7 @@ extern "C" {
2929
#define RCC_FREQ_30M ((uint32_t)30000000)
3030
#define RCC_FREQ_24M ((uint32_t)24000000)
3131
#define RCC_FREQ_4M ((uint32_t)3600000)
32-
#define RCC_FREQ_32768 ((uint32_t)32768)
33-
#define RCC_FREQ_32000 ((uint32_t)32000)
32+
#define RCC_FREQ_32768 ((uint32_t)32768)
3433

3534
#define RCC_WAIT() \
3635
do { \

Drivers/peripheral/src/tremo_lpuart.c

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -217,12 +217,10 @@ void lpuart_init(lpuart_t* lpuart, lpuart_init_t* uart_init)
217217
uint32_t freq = 0;
218218

219219
lpuart_clk_freq = rcc_get_lpuart_clk_source();
220-
if (lpuart_clk_freq == RCC_CR1_LPUART_CLK_SEL_XO32K) {
221-
freq = 32768;
222-
} else if (lpuart_clk_freq == RCC_CR1_LPUART_CLK_SEL_RCO32K) {
223-
freq = 32000;
220+
if (lpuart_clk_freq == RCC_CR1_LPUART_CLK_SEL_XO32K || lpuart_clk_freq == RCC_CR1_LPUART_CLK_SEL_RCO32K) {
221+
freq = RCC_FREQ_32768;
224222
} else {
225-
freq = 4000000;
223+
freq = RCC_FREQ_4M;
226224
}
227225
if (uart_init->low_level_wakeup == true) {
228226
tmp_value |= LPUART_CR0_LOW_LEVEL_WAKEUP;

Drivers/peripheral/src/tremo_pwr.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,8 @@
1010

1111
void deepsleep(uint32_t mode, uint32_t wfi)
1212
{
13+
PWR->CR1 |= 1<<4;
14+
1315
if((TREMO_REG_RD(0x10002010) & 0x3) == 0)
1416
TREMO_REG_SET(PWR->CR1, (0xF<<20), (1<<20));
1517

Drivers/peripheral/src/tremo_rcc.c

Lines changed: 31 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
#include "tremo_delay.h"
12
#include "tremo_rcc.h"
23

34
/**
@@ -17,10 +18,7 @@ uint32_t rcc_get_clk_freq(rcc_clk_t clk)
1718
sysclk_freq = RCC_FREQ_48M;
1819
break;
1920
}
20-
case RCC_CR0_SYSCLK_SEL_RCO32K: {
21-
sysclk_freq = RCC_FREQ_32000;
22-
break;
23-
}
21+
case RCC_CR0_SYSCLK_SEL_RCO32K:
2422
case RCC_CR0_SYSCLK_SEL_XO32K: {
2523
sysclk_freq = RCC_FREQ_32768;
2624
break;
@@ -328,6 +326,7 @@ void rcc_set_lptimer0_clk_source(rcc_lptimer0_clk_source_t clk_source)
328326
if (clk_source == RCC_LPTIMER0_CLK_SOURCE_EXTCLK) {
329327
TREMO_REG_EN(RCC->CR1, RCC_CR1_LPTIMER0_EXTCLK_SEL_MASK, true);
330328
} else {
329+
TREMO_REG_EN(RCC->CR1, RCC_CR1_LPTIMER0_EXTCLK_SEL_MASK, false);
331330
TREMO_REG_SET(RCC->CR1, RCC_CR1_LPTIMER0_CLK_SEL_MASK, clk_source);
332331
}
333332
}
@@ -354,6 +353,7 @@ void rcc_set_lptimer1_clk_source(rcc_lptimer1_clk_source_t clk_source)
354353
if (clk_source == RCC_LPTIMER1_CLK_SOURCE_EXTCLK) {
355354
TREMO_REG_EN(RCC->CR1, RCC_CR1_LPTIMER1_EXTCLK_SEL_MASK, true);
356355
} else {
356+
TREMO_REG_EN(RCC->CR1, RCC_CR1_LPTIMER1_EXTCLK_SEL_MASK, false);
357357
TREMO_REG_SET(RCC->CR1, RCC_CR1_LPTIMER1_CLK_SEL_MASK, clk_source);
358358
}
359359
}
@@ -812,6 +812,8 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
812812
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
813813
;
814814
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_LPUART_AON_CLK_EN_MASK, new_state);
815+
while ((RCC->SR & RCC_SR_LPUART_AON_CLK_EN_DONE) != RCC_SR_LPUART_AON_CLK_EN_DONE)
816+
;
815817
break;
816818
}
817819
case RCC_PERIPHERAL_SSP0: {
@@ -860,6 +862,8 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
860862
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
861863
;
862864
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_LCD_AON_CLK_EN_MASK, new_state);
865+
while ((RCC->SR & RCC_SR_LCD_AON_CLK_EN_DONE) != RCC_SR_LCD_AON_CLK_EN_DONE)
866+
;
863867
break;
864868
}
865869
case RCC_PERIPHERAL_LORA: {
@@ -913,6 +917,8 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
913917
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
914918
;
915919
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_LPTIMER0_AON_CLK_EN_MASK, new_state);
920+
while ((RCC->SR & RCC_SR_LPTIM_AON_CLK_EN_DONE) != RCC_SR_LPTIM_AON_CLK_EN_DONE)
921+
;
916922

917923
TREMO_REG_EN(RCC->CGR1, RCC_CGR1_LPTIMER0_CLK_EN_MASK, new_state);
918924
} else {
@@ -921,8 +927,10 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
921927
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
922928
;
923929
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_LPTIMER0_AON_CLK_EN_MASK, new_state);
930+
while ((RCC->SR & RCC_SR_LPTIM_AON_CLK_EN_DONE) != RCC_SR_LPTIM_AON_CLK_EN_DONE)
931+
;
924932

925-
TREMO_REG_EN(RCC->CGR1, RCC_CGR1_LPTIMER0_PCLK_EN_MASK, new_state);
933+
//TREMO_REG_EN(RCC->CGR1, RCC_CGR1_LPTIMER0_PCLK_EN_MASK, new_state);
926934
}
927935

928936
break;
@@ -935,6 +943,8 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
935943
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
936944
;
937945
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_LPTIMER1_AON_CLK_EN_MASK, new_state);
946+
while ((RCC->SR & RCC_SR_LPTIMER1_AON_CLK_EN_DONE) != RCC_SR_LPTIMER1_AON_CLK_EN_DONE)
947+
;
938948

939949
TREMO_REG_EN(RCC->CGR1, RCC_CGR1_LPTIMER1_CLK_EN_MASK, new_state);
940950
} else {
@@ -943,8 +953,10 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
943953
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
944954
;
945955
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_LPTIMER1_AON_CLK_EN_MASK, new_state);
956+
while ((RCC->SR & RCC_SR_LPTIMER1_AON_CLK_EN_DONE) != RCC_SR_LPTIMER1_AON_CLK_EN_DONE)
957+
;
946958

947-
TREMO_REG_EN(RCC->CGR1, RCC_CGR1_LPTIMER1_PCLK_EN_MASK, new_state);
959+
//TREMO_REG_EN(RCC->CGR1, RCC_CGR1_LPTIMER1_PCLK_EN_MASK, new_state);
948960
}
949961

950962
break;
@@ -955,6 +967,8 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
955967
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
956968
;
957969
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_IWDG_CLK_EN_MASK, new_state);
970+
while ((RCC->SR & RCC_SR_IWDG_AON_CLK_EN_DONE) != RCC_SR_IWDG_AON_CLK_EN_DONE)
971+
;
958972

959973
break;
960974
}
@@ -969,6 +983,8 @@ void rcc_enable_peripheral_clk(rcc_peripheral_t peripheral, bool new_state)
969983
while ((RCC->SR & RCC_SR_ALL_DONE) != RCC_SR_ALL_DONE)
970984
;
971985
TREMO_REG_EN(RCC->CGR2, RCC_CGR2_RTC_AON_CLK_EN_MASK, new_state);
986+
while ((RCC->SR & RCC_SR_RTC_AON_CLK_EN_DONE) != RCC_SR_RTC_AON_CLK_EN_DONE)
987+
;
972988
break;
973989
}
974990
case RCC_PERIPHERAL_CRC: {
@@ -1085,6 +1101,15 @@ void rcc_rst_peripheral(rcc_peripheral_t peripheral, bool new_state)
10851101

10861102
TREMO_REG_EN(RCC->RST0, 1 << pos, !new_state);
10871103
}
1104+
1105+
if((!new_state) && (peripheral == RCC_PERIPHERAL_LPTIMER1 ||
1106+
peripheral == RCC_PERIPHERAL_LPTIMER0 ||
1107+
peripheral == RCC_PERIPHERAL_LCD ||
1108+
peripheral == RCC_PERIPHERAL_RTC ||
1109+
peripheral == RCC_PERIPHERAL_IWDG ||
1110+
peripheral == RCC_PERIPHERAL_LPUART)) {
1111+
delay_us(92);
1112+
}
10881113
}
10891114

10901115
/**

Drivers/peripheral/src/tremo_rtc.c

Lines changed: 3 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -445,7 +445,7 @@ void rtc_get_calendar(rtc_calendar_t* rtc_calendar)
445445
uint32_t syn_data_h;
446446
uint8_t temp;
447447
uint16_t subsecond_cnt;
448-
float subsecond;
448+
float subsecond = 0;
449449

450450
if (rtc_calendar == NULL) {
451451
return;
@@ -460,11 +460,7 @@ void rtc_get_calendar(rtc_calendar_t* rtc_calendar)
460460
} while (syn_data_h != RTC->CALENDAR_R_H);
461461
} while ((subsecond_cnt != rtc_get_subsecond_cnt()) || subsecond_cnt<1);
462462

463-
if (RCC_RTC_CLK_SOURCE_XO32K == rcc_get_rtc_clk_source()) {
464-
subsecond = ((float)(((float)RTC_MICROSECOND) / 32768) * subsecond_cnt) + 0.5;
465-
} else {
466-
subsecond = ((float)(((float)RTC_MICROSECOND) / 32000) * subsecond_cnt) + 0.5;
467-
}
463+
subsecond = ((float)(((float)RTC_MICROSECOND) / 32768) * subsecond_cnt) + 0.5;
468464
rtc_calendar->subsecond = (uint32_t)subsecond;
469465

470466
temp = syn_data & 0x0F;
@@ -605,11 +601,7 @@ void rtc_set_alarm(uint8_t alarm_index, rtc_alarm_mask_t* alarm_mask, rtc_calend
605601
return;
606602
}
607603
if (alarm_mask->subsecMask != 0) {
608-
if (RCC_RTC_CLK_SOURCE_XO32K == rcc_get_rtc_clk_source()) {
609-
temp = ((float)(time->subsecond)) / ((float)(((float)RTC_MICROSECOND) / 32768)) + 0.5;
610-
} else {
611-
temp = ((float)(time->subsecond)) / ((float)(((float)RTC_MICROSECOND) / 32000)) + 0.5;
612-
}
604+
temp = ((float)(time->subsecond)) / ((float)(((float)RTC_MICROSECOND) / 32768)) + 0.5;
613605
rtc_check_syn();
614606
*alarm_subsec_reg &= 0xFFFF0000;
615607
rtc_check_syn();

Drivers/sensor/gpio_exti.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -27,15 +27,15 @@ void POWER_IoInit(void)
2727
{
2828
POWER_CLK_ENABLE();
2929
gpio_set_iomux(POWER_PORT, POWER_5V_PIN, 0);
30-
gpio_init(POWER_PORT, POWER_5V_PIN, GPIO_MODE_OUTPUT_OD_LOW);
30+
gpio_init(POWER_PORT, POWER_5V_PIN, GPIO_MODE_OUTPUT_PP_LOW);
3131
delay_ms(20);
3232
}
3333

3434
void POWER_IoDeInit(void)
3535
{
3636
POWER_CLK_ENABLE();
3737
gpio_set_iomux(POWER_PORT, POWER_5V_PIN, 0);
38-
gpio_init(POWER_PORT, POWER_5V_PIN,GPIO_MODE_OUTPUT_OD_HIZ);
38+
gpio_init(POWER_PORT, POWER_5V_PIN,GPIO_MODE_OUTPUT_PP_HIGH);
3939
}
4040

4141
void GPIO_EXTI4_IoInit(uint8_t state)

Middlewares/LoRa/driver/rtc-board.c

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -339,9 +339,6 @@ TimerTime_t RtcConvertMsToTick( TimerTime_t timeoutValue )
339339
double retVal = 0;
340340
uint32_t rtc_ticks_per_second = 32768;
341341

342-
if (RCC_RTC_CLK_SOURCE_RCO32K == rcc_get_rtc_clk_source())
343-
rtc_ticks_per_second = 32000;
344-
345342
retVal = round( ( ( double )timeoutValue ) * rtc_ticks_per_second / 1000);
346343
return( ( TimerTime_t )retVal );
347344
}

Middlewares/LoRa/driver/sx1262-board.c

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@
2222
*/
2323
#include <stdlib.h>
2424
#include "delay.h"
25+
#include "tremo_rcc.h"
2526
#include "tremo_gpio.h"
2627
#include "tremo_regs.h"
2728
#include "tremo_delay.h"
@@ -66,8 +67,8 @@ void SX126xLoracInit()
6667
rcc_rst_peripheral(RCC_PERIPHERAL_LORA, true);
6768
rcc_rst_peripheral(RCC_PERIPHERAL_LORA, false);
6869
rcc_enable_peripheral_clk(RCC_PERIPHERAL_LORA, true);
69-
70-
LORAC->CR0 = 0x00000200;
70+
71+
LORAC->CR0 = 0x00000200;
7172

7273
LORAC->SSP_CR0 = 0x07;
7374
LORAC->SSP_CPSR = 0x02;
@@ -78,7 +79,7 @@ void SX126xLoracInit()
7879
{
7980
delay_us(20);
8081
LORAC->NSS_CR = 0;
81-
delay_us(20);
82+
delay_us(110);
8283
LORAC->NSS_CR = 1;
8384
}
8485

@@ -102,9 +103,9 @@ uint32_t SX126xGetBoardTcxoWakeupTime( void )
102103
void SX126xReset( void )
103104
{
104105
LORAC->CR1 &= ~(1<<5); //nreset
105-
delay_us(100);
106-
LORAC->CR1 |= 1<<5; //nreset
107-
LORAC->CR1 &= ~(1<<7); //por
106+
delay_us(100);
107+
LORAC->CR1 |= 1<<5; //nreset release
108+
LORAC->CR1 &= ~(1<<7); //por release
108109
LORAC->CR0 |= 1<<5; //irq0
109110
LORAC->CR1 |= 0x1; //tcxo
110111

@@ -113,7 +114,7 @@ void SX126xReset( void )
113114

114115
void SX126xWaitOnBusy( void )
115116
{
116-
delay_us(20);
117+
delay_us(10);
117118
while( LORAC->SR & 0x100 );
118119
}
119120

@@ -122,7 +123,7 @@ void SX126xWakeup( void )
122123
BoardDisableIrq( );
123124

124125
LORAC->NSS_CR = 0;
125-
delay_us(10);
126+
delay_us(20);
126127

127128
SpiInOut( RADIO_GET_STATUS );
128129
SpiInOut( 0x00 );

Projects/Applications/DRAGINO-LRWAN-AT/inc/version.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -68,7 +68,7 @@ Maintainer: Miguel Luis, Gregory Cristian and Wael Guibene
6868

6969
/* Includes ------------------------------------------------------------------*/
7070

71-
#define AT_VERSION_STRING "v1.0"
71+
#define AT_VERSION_STRING "v1.1"
7272
#define AT_LoRaWan_VERSION_STRING "DR-LWS-007"
7373

7474
/* Exported types ------------------------------------------------------------*/

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