Skip to content

Commit 37fa92a

Browse files
authored
[CIR][CIRGen][Builtin][Neon] Lower neon_vrshrd_n for s64 and u64 (#1383)
Lower neon_vrshrd_n for s64 and u64
1 parent dda69c8 commit 37fa92a

File tree

2 files changed

+35
-13
lines changed

2 files changed

+35
-13
lines changed

clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3836,7 +3836,21 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
38363836
}
38373837
case NEON::BI__builtin_neon_vrshrd_n_u64:
38383838
case NEON::BI__builtin_neon_vrshrd_n_s64: {
3839-
llvm_unreachable("NEON::BI__builtin_neon_vrshrd_n_s64 NYI");
3839+
cir::IntType IntType = BuiltinID == NEON::BI__builtin_neon_vrshrd_n_u64
3840+
? builder.getUInt64Ty()
3841+
: builder.getSInt64Ty();
3842+
3843+
const StringRef Intrinsic = BuiltinID == NEON::BI__builtin_neon_vrshrd_n_u64
3844+
? "aarch64.neon.urshl"
3845+
: "aarch64.neon.srshl";
3846+
Ops.push_back(emitScalarExpr(E->getArg(1)));
3847+
std::optional<llvm::APSInt> APSInt =
3848+
E->getArg(1)->getIntegerConstantExpr(getContext());
3849+
assert(APSInt && "Expected argument to be a constant");
3850+
int64_t SV = -APSInt->getSExtValue();
3851+
Ops[1] = builder.getSInt64(SV, getLoc(E->getExprLoc()));
3852+
return emitNeonCall(builder, {IntType, builder.getSInt64Ty()}, Ops,
3853+
Intrinsic, IntType, getLoc(E->getExprLoc()));
38403854
}
38413855
case NEON::BI__builtin_neon_vrsrad_n_u64:
38423856
case NEON::BI__builtin_neon_vrsrad_n_s64: {

clang/test/CIR/CodeGen/AArch64/neon.c

Lines changed: 20 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -15209,12 +15209,16 @@ uint64_t test_vshrd_n_u64_3(uint64_t a) {
1520915209
// LLVM: ret i64 [[SHRD_N]]
1521015210
}
1521115211

15212-
// NYI-LABEL: @test_vrshrd_n_s64(
15213-
// NYI: [[VRSHR_N:%.*]] = call i64 @llvm.aarch64.neon.srshl.i64(i64 %a, i64 -63)
15214-
// NYI: ret i64 [[VRSHR_N]]
15215-
// int64_t test_vrshrd_n_s64(int64_t a) {
15216-
// return (int64_t)vrshrd_n_s64(a, 63);
15217-
// }
15212+
int64_t test_vrshrd_n_s64(int64_t a) {
15213+
return (int64_t)vrshrd_n_s64(a, 63);
15214+
15215+
// CIR-LABEL: vrshrd_n_s64
15216+
// CIR: [[TMP0:%.*]] = cir.llvm.intrinsic "aarch64.neon.srshl" {{.*}}, {{.*}} : (!s64i, !s64i) -> !s64i
15217+
15218+
// LLVM-LABEL: @test_vrshrd_n_s64(
15219+
// LLVM: [[VRSHR_N:%.*]] = call i64 @llvm.aarch64.neon.srshl.i64(i64 %0, i64 -63)
15220+
// LLVM: ret i64 [[VRSHR_N]]
15221+
}
1521815222

1521915223
// NYI-LABEL: @test_vrshr_n_s64(
1522015224
// NYI: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>
@@ -15225,12 +15229,16 @@ uint64_t test_vshrd_n_u64_3(uint64_t a) {
1522515229
// return vrshr_n_s64(a, 1);
1522615230
// }
1522715231

15228-
// NYI-LABEL: @test_vrshrd_n_u64(
15229-
// NYI: [[VRSHR_N:%.*]] = call i64 @llvm.aarch64.neon.urshl.i64(i64 %a, i64 -63)
15230-
// NYI: ret i64 [[VRSHR_N]]
15231-
// uint64_t test_vrshrd_n_u64(uint64_t a) {
15232-
// return (uint64_t)vrshrd_n_u64(a, 63);
15233-
// }
15232+
uint64_t test_vrshrd_n_u64(uint64_t a) {
15233+
return (uint64_t)vrshrd_n_u64(a, 63);
15234+
15235+
// CIR-LABEL: vrshrd_n_u64
15236+
// CIR: [[TMP0:%.*]] = cir.llvm.intrinsic "aarch64.neon.urshl" {{.*}}, {{.*}} : (!u64i, !s64i) -> !u64i
15237+
15238+
// LLVM-LABEL: @test_vrshrd_n_u64(
15239+
// LLVM: [[VRSHR_N:%.*]] = call i64 @llvm.aarch64.neon.urshl.i64(i64 %0, i64 -63)
15240+
// LLVM: ret i64 [[VRSHR_N]]
15241+
}
1523415242

1523515243
// NYI-LABEL: @test_vrshr_n_u64(
1523615244
// NYI: [[TMP0:%.*]] = bitcast <1 x i64> %a to <8 x i8>

0 commit comments

Comments
 (0)