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[CIR][CIRGen][Builtin][NFC] Refactor IntrinsicCallOp (#1056)
`IntrinsicCallOp` is now named `LLVMIntrinsicCallOp` to better reflect its purpose. And now In CIR, we do not have "llvm" prefix which will be added later during LLVMLowering.
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9 files changed

+207
-227
lines changed

9 files changed

+207
-227
lines changed

clang/include/clang/CIR/Dialect/IR/CIROps.td

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3445,11 +3445,11 @@ def FuncOp : CIR_Op<"func", [
34453445
}
34463446

34473447
//===----------------------------------------------------------------------===//
3448-
// IntrinsicCallOp
3448+
// LLVMIntrinsicCallOp
34493449
//===----------------------------------------------------------------------===//
34503450

3451-
def IntrinsicCallOp : CIR_Op<"llvm.intrinsic"> {
3452-
let summary = "Call to intrinsic functions that is not defined in CIR";
3451+
def LLVMIntrinsicCallOp : CIR_Op<"llvm.intrinsic"> {
3452+
let summary = "Call to llvm intrinsic functions that is not defined in CIR";
34533453
let description = [{
34543454
`cir.llvm.intrinsic` operation represents a call-like expression which has
34553455
return type and arguments that maps directly to a llvm intrinsic.
@@ -3476,7 +3476,6 @@ def IntrinsicCallOp : CIR_Op<"llvm.intrinsic"> {
34763476
}]>,
34773477
];
34783478

3479-
let hasVerifier = 1;
34803479
}
34813480

34823481
//===----------------------------------------------------------------------===//

clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp

Lines changed: 37 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -2127,7 +2127,7 @@ static mlir::Value buildArmLdrexNon128Intrinsic(unsigned int builtinID,
21272127
CIRGenFunction &cgf) {
21282128
StringRef intrinsicName;
21292129
if (builtinID == clang::AArch64::BI__builtin_arm_ldrex) {
2130-
intrinsicName = "llvm.aarch64.ldxr";
2130+
intrinsicName = "aarch64.ldxr";
21312131
} else {
21322132
llvm_unreachable("Unknown builtinID");
21332133
}
@@ -2141,8 +2141,9 @@ static mlir::Value buildArmLdrexNon128Intrinsic(unsigned int builtinID,
21412141
// which can be found under LLVM IR directory.
21422142
mlir::Type funcResTy = builder.getSInt64Ty();
21432143
mlir::Location loc = cgf.getLoc(clangCallExpr->getExprLoc());
2144-
mlir::cir::IntrinsicCallOp op = builder.create<mlir::cir::IntrinsicCallOp>(
2145-
loc, builder.getStringAttr(intrinsicName), funcResTy, loadAddr);
2144+
mlir::cir::LLVMIntrinsicCallOp op =
2145+
builder.create<mlir::cir::LLVMIntrinsicCallOp>(
2146+
loc, builder.getStringAttr(intrinsicName), funcResTy, loadAddr);
21462147
mlir::Value res = op.getResult();
21472148

21482149
// Convert result type to the expected type.
@@ -2269,7 +2270,7 @@ mlir::Value buildNeonCall(CIRGenBuilderTy &builder,
22692270
return nullptr;
22702271
}
22712272
return builder
2272-
.create<mlir::cir::IntrinsicCallOp>(
2273+
.create<mlir::cir::LLVMIntrinsicCallOp>(
22732274
loc, builder.getStringAttr(intrinsicName), funcResTy, args)
22742275
.getResult();
22752276
}
@@ -2379,27 +2380,27 @@ mlir::Value CIRGenFunction::buildCommonNeonBuiltinExpr(
23792380
return buildNeonCall(builder, {resTy, mulVecT, SInt32Ty}, ops,
23802381
(builtinID == NEON::BI__builtin_neon_vqdmulhq_lane_v ||
23812382
builtinID == NEON::BI__builtin_neon_vqdmulh_lane_v)
2382-
? "llvm.aarch64.neon.sqdmulh.lane"
2383-
: "llvm.aarch64.neon.sqrdmulh.lane",
2383+
? "aarch64.neon.sqdmulh.lane"
2384+
: "aarch64.neon.sqrdmulh.lane",
23842385
resTy, getLoc(e->getExprLoc()));
23852386
}
23862387
case NEON::BI__builtin_neon_vqshlu_n_v:
23872388
case NEON::BI__builtin_neon_vqshluq_n_v: {
23882389
// These intrinsics expect signed vector type as input, but
23892390
// return unsigned vector type.
23902391
mlir::cir::VectorType srcTy = getSignChangedVectorType(builder, vTy);
2391-
return buildNeonCall(
2392-
builder, {srcTy, srcTy}, ops, "llvm.aarch64.neon.sqshlu", vTy,
2393-
getLoc(e->getExprLoc()), false, /* not fp constrained op */
2394-
1, /* second arg is shift amount */
2395-
false /* leftshift */);
2392+
return buildNeonCall(builder, {srcTy, srcTy}, ops, "aarch64.neon.sqshlu",
2393+
vTy, getLoc(e->getExprLoc()),
2394+
false, /* not fp constrained op */
2395+
1, /* second arg is shift amount */
2396+
false /* leftshift */);
23962397
}
23972398
case NEON::BI__builtin_neon_vrshr_n_v:
23982399
case NEON::BI__builtin_neon_vrshrq_n_v: {
23992400
return buildNeonCall(
24002401
builder,
24012402
{vTy, isUnsigned ? getSignChangedVectorType(builder, vTy) : vTy}, ops,
2402-
isUnsigned ? "llvm.aarch64.neon.urshl" : "llvm.aarch64.neon.srshl", vTy,
2403+
isUnsigned ? "aarch64.neon.urshl" : "aarch64.neon.srshl", vTy,
24032404
getLoc(e->getExprLoc()), false, /* not fp constrained op*/
24042405
1, /* second arg is shift amount */
24052406
true /* rightshift */);
@@ -2440,7 +2441,7 @@ mlir::Value CIRGenFunction::buildCommonNeonBuiltinExpr(
24402441
ops[0] = builder.createBitcast(ops[0], ty);
24412442
ops[1] = builder.createBitcast(ops[1], ty);
24422443
ops[0] = builder.createAnd(ops[0], ops[1]);
2443-
// Note that during LLVM Lowering, result of `VecCmpOp` is sign extended,
2444+
// Note that during vmVM Lowering, result of `VecCmpOp` is sign extended,
24442445
// matching traditional codegen behavior.
24452446
return builder.create<mlir::cir::VecCmpOp>(
24462447
loc, ty, mlir::cir::CmpOpKind::ne, ops[0], builder.getZero(loc, ty));
@@ -2459,42 +2460,41 @@ mlir::Value CIRGenFunction::buildCommonNeonBuiltinExpr(
24592460
case NEON::BI__builtin_neon_vpadd_v:
24602461
case NEON::BI__builtin_neon_vpaddq_v: {
24612462
intrincsName = mlir::isa<mlir::FloatType>(vTy.getEltType())
2462-
? "llvm.aarch64.neon.faddp"
2463-
: "llvm.aarch64.neon.addp";
2463+
? "aarch64.neon.faddp"
2464+
: "aarch64.neon.addp";
24642465
break;
24652466
}
24662467
case NEON::BI__builtin_neon_vqadd_v:
24672468
case NEON::BI__builtin_neon_vqaddq_v: {
2468-
intrincsName = (intrinicId != altLLVMIntrinsic) ? "llvm.aarch64.neon.uqadd"
2469-
: "llvm.aarch64.neon.sqadd";
2469+
intrincsName = (intrinicId != altLLVMIntrinsic) ? "aarch64.neon.uqadd"
2470+
: "aarch64.neon.sqadd";
24702471
break;
24712472
}
24722473
case NEON::BI__builtin_neon_vqsub_v:
24732474
case NEON::BI__builtin_neon_vqsubq_v: {
2474-
intrincsName = (intrinicId != altLLVMIntrinsic) ? "llvm.aarch64.neon.uqsub"
2475-
: "llvm.aarch64.neon.sqsub";
2475+
intrincsName = (intrinicId != altLLVMIntrinsic) ? "aarch64.neon.uqsub"
2476+
: "aarch64.neon.sqsub";
24762477
break;
24772478
}
24782479
case NEON::BI__builtin_neon_vrhadd_v:
24792480
case NEON::BI__builtin_neon_vrhaddq_v: {
2480-
intrincsName = (intrinicId != altLLVMIntrinsic)
2481-
? "llvm.aarch64.neon.urhadd"
2482-
: "llvm.aarch64.neon.srhadd";
2481+
intrincsName = (intrinicId != altLLVMIntrinsic) ? "aarch64.neon.urhadd"
2482+
: "aarch64.neon.srhadd";
24832483
break;
24842484
}
24852485
case NEON::BI__builtin_neon_vshlq_v: {
2486-
intrincsName = (intrinicId != altLLVMIntrinsic) ? "llvm.aarch64.neon.ushl"
2487-
: "llvm.aarch64.neon.sshl";
2486+
intrincsName = (intrinicId != altLLVMIntrinsic) ? "aarch64.neon.ushl"
2487+
: "aarch64.neon.sshl";
24882488
break;
24892489
}
24902490
case NEON::BI__builtin_neon_vhadd_v:
24912491
case NEON::BI__builtin_neon_vhaddq_v: {
2492-
intrincsName = (intrinicId != altLLVMIntrinsic) ? "llvm.aarch64.neon.uhadd"
2493-
: "llvm.aarch64.neon.shadd";
2492+
intrincsName = (intrinicId != altLLVMIntrinsic) ? "aarch64.neon.uhadd"
2493+
: "aarch64.neon.shadd";
24942494
break;
24952495
}
24962496
case NEON::BI__builtin_neon_vqmovun_v: {
2497-
intrincsName = "llvm.aarch64.neon.sqxtun";
2497+
intrincsName = "aarch64.neon.sqxtun";
24982498
argTypes.push_back(builder.getExtendedOrTruncatedElementVectorType(
24992499
vTy, true /* extended */, true /* signed */));
25002500
break;
@@ -3259,10 +3259,9 @@ CIRGenFunction::buildAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
32593259
llvm_unreachable("NYI");
32603260
}
32613261
case NEON::BI__builtin_neon_vmull_v: {
3262-
llvm::StringRef name =
3263-
usgn ? "llvm.aarch64.neon.umull" : "llvm.aarch64.neon.smull";
3262+
llvm::StringRef name = usgn ? "aarch64.neon.umull" : "aarch64.neon.smull";
32643263
if (Type.isPoly())
3265-
name = "llvm.aarch64.neon.pmull";
3264+
name = "aarch64.neon.pmull";
32663265
mlir::cir::VectorType argTy =
32673266
builder.getExtendedOrTruncatedElementVectorType(
32683267
ty, false /* truncated */, !usgn);
@@ -3277,10 +3276,9 @@ CIRGenFunction::buildAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
32773276
}
32783277
case NEON::BI__builtin_neon_vmin_v:
32793278
case NEON::BI__builtin_neon_vminq_v: {
3280-
llvm::StringRef name =
3281-
usgn ? "llvm.aarch64.neon.umin" : "llvm.aarch64.neon.smin";
3279+
llvm::StringRef name = usgn ? "aarch64.neon.umin" : "aarch64.neon.smin";
32823280
if (mlir::cir::isFPOrFPVectorTy(ty))
3283-
name = "llvm.aarch64.neon.fmin";
3281+
name = "aarch64.neon.fmin";
32843282
return buildNeonCall(builder, {ty, ty}, Ops, name, ty,
32853283
getLoc(E->getExprLoc()));
32863284
}
@@ -3289,10 +3287,9 @@ CIRGenFunction::buildAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
32893287
}
32903288
case NEON::BI__builtin_neon_vabd_v:
32913289
case NEON::BI__builtin_neon_vabdq_v: {
3292-
llvm::StringRef name =
3293-
usgn ? "llvm.aarch64.neon.uabd" : "llvm.aarch64.neon.sabd";
3290+
llvm::StringRef name = usgn ? "aarch64.neon.uabd" : "aarch64.neon.sabd";
32943291
if (mlir::cir::isFPOrFPVectorTy(ty))
3295-
name = "llvm.aarch64.neon.fabd";
3292+
name = "aarch64.neon.fabd";
32963293
return buildNeonCall(builder, {ty, ty}, Ops, name, ty,
32973294
getLoc(E->getExprLoc()));
32983295
}
@@ -3332,7 +3329,7 @@ CIRGenFunction::buildAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
33323329
builder,
33333330
{builder.getExtendedOrTruncatedElementVectorType(ty, true, true),
33343331
SInt32Ty},
3335-
Ops, "llvm.aarch64.neon.sqrshrun", ty, getLoc(E->getExprLoc()));
3332+
Ops, "aarch64.neon.sqrshrun", ty, getLoc(E->getExprLoc()));
33363333
case NEON::BI__builtin_neon_vqshrn_n_v:
33373334
llvm_unreachable("NYI");
33383335
case NEON::BI__builtin_neon_vrshrn_n_v:
@@ -3342,7 +3339,7 @@ CIRGenFunction::buildAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
33423339
vTy, true /* extend */,
33433340
mlir::cast<mlir::cir::IntType>(vTy.getEltType()).isSigned()),
33443341
SInt32Ty},
3345-
Ops, "llvm.aarch64.neon.rshrn", ty, getLoc(E->getExprLoc()));
3342+
Ops, "aarch64.neon.rshrn", ty, getLoc(E->getExprLoc()));
33463343
case NEON::BI__builtin_neon_vqrshrn_n_v:
33473344
llvm_unreachable("NYI");
33483345
case NEON::BI__builtin_neon_vrndah_f16: {
@@ -3351,7 +3348,7 @@ CIRGenFunction::buildAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
33513348
case NEON::BI__builtin_neon_vrnda_v:
33523349
case NEON::BI__builtin_neon_vrndaq_v: {
33533350
assert(!MissingFeatures::buildConstrainedFPCall());
3354-
return buildNeonCall(builder, {ty}, Ops, "llvm.round", ty,
3351+
return buildNeonCall(builder, {ty}, Ops, "round", ty,
33553352
getLoc(E->getExprLoc()));
33563353
}
33573354
case NEON::BI__builtin_neon_vrndih_f16: {
@@ -3374,7 +3371,7 @@ CIRGenFunction::buildAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
33743371
case NEON::BI__builtin_neon_vrndns_f32: {
33753372
mlir::Value arg0 = buildScalarExpr(E->getArg(0));
33763373
args.push_back(arg0);
3377-
return buildNeonCall(builder, {arg0.getType()}, args, "llvm.roundeven.f32",
3374+
return buildNeonCall(builder, {arg0.getType()}, args, "roundeven.f32",
33783375
getCIRGenModule().FloatTy, getLoc(E->getExprLoc()));
33793376
}
33803377
case NEON::BI__builtin_neon_vrndph_f16: {

clang/lib/CIR/Dialect/IR/CIRDialect.cpp

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2561,12 +2561,6 @@ LogicalResult mlir::cir::FuncOp::verifyType() {
25612561
return success();
25622562
}
25632563

2564-
LogicalResult mlir::cir::IntrinsicCallOp::verify() {
2565-
if (!getIntrinsicName().starts_with("llvm."))
2566-
return emitOpError() << "intrinsic name must start with 'llvm.'";
2567-
return success();
2568-
}
2569-
25702564
// Verifies linkage types
25712565
// - functions don't have 'common' linkage
25722566
// - external functions have 'external' or 'extern_weak' linkage

clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2981,12 +2981,13 @@ static mlir::LLVM::CallIntrinsicOp replaceOpWithCallLLVMIntrinsicOp(
29812981
}
29822982

29832983
class CIRIntrinsicCallLowering
2984-
: public mlir::OpConversionPattern<mlir::cir::IntrinsicCallOp> {
2984+
: public mlir::OpConversionPattern<mlir::cir::LLVMIntrinsicCallOp> {
29852985
public:
2986-
using OpConversionPattern<mlir::cir::IntrinsicCallOp>::OpConversionPattern;
2986+
using OpConversionPattern<
2987+
mlir::cir::LLVMIntrinsicCallOp>::OpConversionPattern;
29872988

29882989
mlir::LogicalResult
2989-
matchAndRewrite(mlir::cir::IntrinsicCallOp op, OpAdaptor adaptor,
2990+
matchAndRewrite(mlir::cir::LLVMIntrinsicCallOp op, OpAdaptor adaptor,
29902991
mlir::ConversionPatternRewriter &rewriter) const override {
29912992
mlir::Type llvmResTy =
29922993
getTypeConverter()->convertType(op->getResultTypes()[0]);
@@ -3003,7 +3004,7 @@ class CIRIntrinsicCallLowering
30033004
// TODO(cir): MLIR LLVM dialect should handle this part as CIR has no way
30043005
// to set LLVM IR attribute.
30053006
assert(!::cir::MissingFeatures::llvmIntrinsicElementTypeSupport());
3006-
replaceOpWithCallLLVMIntrinsicOp(rewriter, op, name, llvmResTy,
3007+
replaceOpWithCallLLVMIntrinsicOp(rewriter, op, "llvm." + name, llvmResTy,
30073008
adaptor.getOperands());
30083009
return mlir::success();
30093010
}

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