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[CIR][CodeGen][NFC] Add getMLIRContext to CIRGenModule
Upstream review of a PR requested that we be more explicit with differentiating things from MLIR to similarly named things from clang AST/LLVM/etc. So add an MLIRContext getter that we should start using. Reviewers: bcardosolopes Reviewed By: bcardosolopes Pull Request: #1047
1 parent fca6e2c commit 9e2ff80

16 files changed

+119
-122
lines changed

‎clang/lib/CIR/CodeGen/CIRAsm.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -212,7 +212,7 @@ std::pair<mlir::Value, mlir::Type> CIRGenFunction::buildAsmInputLValue(
212212
uint64_t Size = CGM.getDataLayout().getTypeSizeInBits(Ty);
213213
if ((Size <= 64 && llvm::isPowerOf2_64(Size)) ||
214214
getTargetHooks().isScalarizableAsmOperand(*this, Ty)) {
215-
Ty = mlir::cir::IntType::get(builder.getContext(), Size, false);
215+
Ty = mlir::cir::IntType::get(&getMLIRContext(), Size, false);
216216

217217
return {builder.createLoad(getLoc(Loc),
218218
InputValue.getAddress().withElementType(Ty)),
@@ -434,7 +434,7 @@ mlir::LogicalResult CIRGenFunction::buildAsmStmt(const AsmStmt &S) {
434434

435435
if (RequiresCast) {
436436
unsigned Size = getContext().getTypeSize(QTy);
437-
Ty = mlir::cir::IntType::get(builder.getContext(), Size, false);
437+
Ty = mlir::cir::IntType::get(&getMLIRContext(), Size, false);
438438
}
439439
ResultRegTypes.push_back(Ty);
440440
// If this output is tied to an input, and if the input is larger, then
@@ -657,7 +657,7 @@ mlir::LogicalResult CIRGenFunction::buildAsmStmt(const AsmStmt &S) {
657657
assert(cast<mlir::cir::PointerType>(op.getType()).getPointee() == typ &&
658658
"element type differs from pointee type!");
659659

660-
operandAttrs.push_back(mlir::UnitAttr::get(builder.getContext()));
660+
operandAttrs.push_back(mlir::UnitAttr::get(&getMLIRContext()));
661661
} else {
662662
// We need to add an attribute for every arg since later, during
663663
// the lowering to LLVM IR the attributes will be assigned to the

‎clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1001,7 +1001,7 @@ RValue CIRGenFunction::buildBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
10011001
Probability.convert(llvm::APFloat::IEEEdouble(),
10021002
llvm::RoundingMode::Dynamic, &LoseInfo);
10031003
ProbAttr = mlir::FloatAttr::get(
1004-
mlir::FloatType::getF64(builder.getContext()), Probability);
1004+
mlir::FloatType::getF64(&getMLIRContext()), Probability);
10051005
}
10061006

10071007
auto result = builder.create<mlir::cir::ExpectOp>(
@@ -1176,7 +1176,7 @@ RValue CIRGenFunction::buildBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
11761176
llvm_unreachable("BI__builtin_readsteadycounter NYI");
11771177

11781178
case Builtin::BI__builtin___clear_cache: {
1179-
mlir::Type voidTy = mlir::cir::VoidType::get(builder.getContext());
1179+
mlir::Type voidTy = mlir::cir::VoidType::get(&getMLIRContext());
11801180
mlir::Value begin =
11811181
builder.createPtrBitcast(buildScalarExpr(E->getArg(0)), voidTy);
11821182
mlir::Value end =
@@ -1743,7 +1743,7 @@ RValue CIRGenFunction::buildBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
17431743
EncompassingIntegerType({LeftInfo, RightInfo, ResultInfo});
17441744

17451745
auto EncompassingCIRTy = mlir::cir::IntType::get(
1746-
builder.getContext(), EncompassingInfo.Width, EncompassingInfo.Signed);
1746+
&getMLIRContext(), EncompassingInfo.Width, EncompassingInfo.Signed);
17471747
auto ResultCIRTy =
17481748
mlir::cast<mlir::cir::IntType>(CGM.getTypes().ConvertType(ResultQTy));
17491749

@@ -2034,7 +2034,7 @@ RValue CIRGenFunction::buildBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID,
20342034
auto fnOp =
20352035
CGM.GetOrCreateCIRFunction(ND->getName(), ty, gd, /*ForVTable=*/false,
20362036
/*DontDefer=*/false);
2037-
fnOp.setBuiltinAttr(mlir::UnitAttr::get(builder.getContext()));
2037+
fnOp.setBuiltinAttr(mlir::UnitAttr::get(&getMLIRContext()));
20382038
return buildCall(E->getCallee()->getType(), CIRGenCallee::forDirect(fnOp),
20392039
E, ReturnValue);
20402040
}

‎clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -2370,7 +2370,7 @@ mlir::Value CIRGenFunction::buildCommonNeonBuiltinExpr(
23702370
mlir::cir::VectorType resTy =
23712371
(builtinID == NEON::BI__builtin_neon_vqdmulhq_lane_v ||
23722372
builtinID == NEON::BI__builtin_neon_vqrdmulhq_lane_v)
2373-
? mlir::cir::VectorType::get(builder.getContext(), vTy.getEltType(),
2373+
? mlir::cir::VectorType::get(&getMLIRContext(), vTy.getEltType(),
23742374
vTy.getSize() * 2)
23752375
: vTy;
23762376
mlir::cir::VectorType mulVecT =
@@ -3054,73 +3054,73 @@ CIRGenFunction::buildAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
30543054
case NEON::BI__builtin_neon_vget_lane_i8:
30553055
case NEON::BI__builtin_neon_vdupb_lane_i8:
30563056
Ops[0] = builder.createBitcast(
3057-
Ops[0], mlir::cir::VectorType::get(builder.getContext(), UInt8Ty, 8));
3057+
Ops[0], mlir::cir::VectorType::get(&getMLIRContext(), UInt8Ty, 8));
30583058
return builder.create<mlir::cir::VecExtractOp>(
30593059
getLoc(E->getExprLoc()), Ops[0], buildScalarExpr(E->getArg(1)));
30603060
case NEON::BI__builtin_neon_vgetq_lane_i8:
30613061
case NEON::BI__builtin_neon_vdupb_laneq_i8:
30623062
Ops[0] = builder.createBitcast(
3063-
Ops[0], mlir::cir::VectorType::get(builder.getContext(), UInt8Ty, 16));
3063+
Ops[0], mlir::cir::VectorType::get(&getMLIRContext(), UInt8Ty, 16));
30643064
return builder.create<mlir::cir::VecExtractOp>(
30653065
getLoc(E->getExprLoc()), Ops[0], buildScalarExpr(E->getArg(1)));
30663066
case NEON::BI__builtin_neon_vget_lane_i16:
30673067
case NEON::BI__builtin_neon_vduph_lane_i16:
30683068
Ops[0] = builder.createBitcast(
3069-
Ops[0], mlir::cir::VectorType::get(builder.getContext(), UInt16Ty, 4));
3069+
Ops[0], mlir::cir::VectorType::get(&getMLIRContext(), UInt16Ty, 4));
30703070
return builder.create<mlir::cir::VecExtractOp>(
30713071
getLoc(E->getExprLoc()), Ops[0], buildScalarExpr(E->getArg(1)));
30723072
case NEON::BI__builtin_neon_vgetq_lane_i16:
30733073
case NEON::BI__builtin_neon_vduph_laneq_i16:
30743074
Ops[0] = builder.createBitcast(
3075-
Ops[0], mlir::cir::VectorType::get(builder.getContext(), UInt16Ty, 8));
3075+
Ops[0], mlir::cir::VectorType::get(&getMLIRContext(), UInt16Ty, 8));
30763076
return builder.create<mlir::cir::VecExtractOp>(
30773077
getLoc(E->getExprLoc()), Ops[0], buildScalarExpr(E->getArg(1)));
30783078
case NEON::BI__builtin_neon_vget_lane_i32:
30793079
case NEON::BI__builtin_neon_vdups_lane_i32:
30803080
Ops[0] = builder.createBitcast(
3081-
Ops[0], mlir::cir::VectorType::get(builder.getContext(), UInt32Ty, 2));
3081+
Ops[0], mlir::cir::VectorType::get(&getMLIRContext(), UInt32Ty, 2));
30823082
return builder.create<mlir::cir::VecExtractOp>(
30833083
getLoc(E->getExprLoc()), Ops[0], buildScalarExpr(E->getArg(1)));
30843084
case NEON::BI__builtin_neon_vget_lane_f32:
30853085
case NEON::BI__builtin_neon_vdups_lane_f32:
30863086
Ops[0] = builder.createBitcast(
3087-
Ops[0], mlir::cir::VectorType::get(builder.getContext(), FloatTy, 2));
3087+
Ops[0], mlir::cir::VectorType::get(&getMLIRContext(), FloatTy, 2));
30883088
return builder.create<mlir::cir::VecExtractOp>(
30893089
getLoc(E->getExprLoc()), Ops[0], buildScalarExpr(E->getArg(1)));
30903090
case NEON::BI__builtin_neon_vgetq_lane_i32:
30913091
case NEON::BI__builtin_neon_vdups_laneq_i32:
30923092
Ops[0] = builder.createBitcast(
3093-
Ops[0], mlir::cir::VectorType::get(builder.getContext(), UInt32Ty, 4));
3093+
Ops[0], mlir::cir::VectorType::get(&getMLIRContext(), UInt32Ty, 4));
30943094
return builder.create<mlir::cir::VecExtractOp>(
30953095
getLoc(E->getExprLoc()), Ops[0], buildScalarExpr(E->getArg(1)));
30963096
case NEON::BI__builtin_neon_vget_lane_i64:
30973097
case NEON::BI__builtin_neon_vdupd_lane_i64:
30983098
Ops[0] = builder.createBitcast(
3099-
Ops[0], mlir::cir::VectorType::get(builder.getContext(), UInt64Ty, 1));
3099+
Ops[0], mlir::cir::VectorType::get(&getMLIRContext(), UInt64Ty, 1));
31003100
return builder.create<mlir::cir::VecExtractOp>(
31013101
getLoc(E->getExprLoc()), Ops[0], buildScalarExpr(E->getArg(1)));
31023102
case NEON::BI__builtin_neon_vdupd_lane_f64:
31033103
case NEON::BI__builtin_neon_vget_lane_f64:
31043104
Ops[0] = builder.createBitcast(
3105-
Ops[0], mlir::cir::VectorType::get(builder.getContext(), DoubleTy, 1));
3105+
Ops[0], mlir::cir::VectorType::get(&getMLIRContext(), DoubleTy, 1));
31063106
return builder.create<mlir::cir::VecExtractOp>(
31073107
getLoc(E->getExprLoc()), Ops[0], buildScalarExpr(E->getArg(1)));
31083108
case NEON::BI__builtin_neon_vgetq_lane_i64:
31093109
case NEON::BI__builtin_neon_vdupd_laneq_i64:
31103110
Ops[0] = builder.createBitcast(
3111-
Ops[0], mlir::cir::VectorType::get(builder.getContext(), UInt64Ty, 2));
3111+
Ops[0], mlir::cir::VectorType::get(&getMLIRContext(), UInt64Ty, 2));
31123112
return builder.create<mlir::cir::VecExtractOp>(
31133113
getLoc(E->getExprLoc()), Ops[0], buildScalarExpr(E->getArg(1)));
31143114
case NEON::BI__builtin_neon_vgetq_lane_f32:
31153115
case NEON::BI__builtin_neon_vdups_laneq_f32:
31163116
Ops[0] = builder.createBitcast(
3117-
Ops[0], mlir::cir::VectorType::get(builder.getContext(), FloatTy, 4));
3117+
Ops[0], mlir::cir::VectorType::get(&getMLIRContext(), FloatTy, 4));
31183118
return builder.create<mlir::cir::VecExtractOp>(
31193119
getLoc(E->getExprLoc()), Ops[0], buildScalarExpr(E->getArg(1)));
31203120
case NEON::BI__builtin_neon_vgetq_lane_f64:
31213121
case NEON::BI__builtin_neon_vdupd_laneq_f64:
31223122
Ops[0] = builder.createBitcast(
3123-
Ops[0], mlir::cir::VectorType::get(builder.getContext(), DoubleTy, 2));
3123+
Ops[0], mlir::cir::VectorType::get(&getMLIRContext(), DoubleTy, 2));
31243124
return builder.create<mlir::cir::VecExtractOp>(
31253125
getLoc(E->getExprLoc()), Ops[0], buildScalarExpr(E->getArg(1)));
31263126
case NEON::BI__builtin_neon_vaddh_f16:

‎clang/lib/CIR/CodeGen/CIRGenCXX.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -344,8 +344,7 @@ void CIRGenModule::buildCXXGlobalVarDeclInit(const VarDecl *varDecl,
344344
CIRGenFunction::SourceLocRAIIObject fnLoc{cgf,
345345
getLoc(varDecl->getLocation())};
346346

347-
addr.setAstAttr(
348-
mlir::cir::ASTVarDeclAttr::get(builder.getContext(), varDecl));
347+
addr.setAstAttr(mlir::cir::ASTVarDeclAttr::get(&getMLIRContext(), varDecl));
349348

350349
if (ty->isReferenceType()) {
351350
mlir::OpBuilder::InsertionGuard guard(builder);

‎clang/lib/CIR/CodeGen/CIRGenCall.cpp

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -382,7 +382,7 @@ void CIRGenModule::constructAttributeList(StringRef Name,
382382
if (TargetDecl) {
383383

384384
if (TargetDecl->hasAttr<NoThrowAttr>()) {
385-
auto nu = mlir::cir::NoThrowAttr::get(builder.getContext());
385+
auto nu = mlir::cir::NoThrowAttr::get(&getMLIRContext());
386386
funcAttrs.set(nu.getMnemonic(), nu);
387387
}
388388

@@ -434,12 +434,11 @@ void CIRGenModule::constructAttributeList(StringRef Name,
434434
}
435435

436436
if (TargetDecl->hasAttr<OpenCLKernelAttr>()) {
437-
auto cirKernelAttr =
438-
mlir::cir::OpenCLKernelAttr::get(builder.getContext());
437+
auto cirKernelAttr = mlir::cir::OpenCLKernelAttr::get(&getMLIRContext());
439438
funcAttrs.set(cirKernelAttr.getMnemonic(), cirKernelAttr);
440439

441440
auto uniformAttr = mlir::cir::OpenCLKernelUniformWorkGroupSizeAttr::get(
442-
builder.getContext());
441+
&getMLIRContext());
443442
if (getLangOpts().OpenCLVersion <= 120) {
444443
// OpenCL v1.2 Work groups are always uniform
445444
funcAttrs.set(uniformAttr.getMnemonic(), uniformAttr);
@@ -779,7 +778,7 @@ RValue CIRGenFunction::buildCall(const CIRGenFunctionInfo &CallInfo,
779778
CannotThrow = true;
780779
} else {
781780
// Otherwise, nounwind call sites will never throw.
782-
auto noThrowAttr = mlir::cir::NoThrowAttr::get(builder.getContext());
781+
auto noThrowAttr = mlir::cir::NoThrowAttr::get(&getMLIRContext());
783782
CannotThrow = Attrs.getNamed(noThrowAttr.getMnemonic()).has_value();
784783

785784
if (auto fptr = dyn_cast<mlir::cir::FuncOp>(CalleePtr))
@@ -825,15 +824,15 @@ RValue CIRGenFunction::buildCall(const CIRGenFunctionInfo &CallInfo,
825824
}
826825

827826
auto extraFnAttrs = mlir::cir::ExtraFuncAttributesAttr::get(
828-
builder.getContext(), Attrs.getDictionary(builder.getContext()));
827+
&getMLIRContext(), Attrs.getDictionary(&getMLIRContext()));
829828

830829
mlir::cir::CIRCallOpInterface callLikeOp = buildCallLikeOp(
831830
*this, callLoc, indirectFuncTy, indirectFuncVal, directFuncOp,
832831
CIRCallArgs, isInvoke, callingConv, extraFnAttrs);
833832

834833
if (E)
835834
callLikeOp->setAttr(
836-
"ast", mlir::cir::ASTCallExprAttr::get(builder.getContext(), *E));
835+
"ast", mlir::cir::ASTCallExprAttr::get(&getMLIRContext(), *E));
837836

838837
if (callOrTryCall)
839838
*callOrTryCall = callLikeOp;

‎clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -175,7 +175,7 @@ mlir::cir::CallOp CIRGenFunction::buildCoroIDBuiltinCall(mlir::Location loc,
175175
int32Ty),
176176
/*FD=*/nullptr);
177177
assert(fnOp && "should always succeed");
178-
fnOp.setBuiltinAttr(mlir::UnitAttr::get(builder.getContext()));
178+
fnOp.setBuiltinAttr(mlir::UnitAttr::get(&getMLIRContext()));
179179
} else
180180
fnOp = cast<mlir::cir::FuncOp>(builtin);
181181

@@ -197,7 +197,7 @@ CIRGenFunction::buildCoroAllocBuiltinCall(mlir::Location loc) {
197197
mlir::cir::FuncType::get({int32Ty}, boolTy),
198198
/*FD=*/nullptr);
199199
assert(fnOp && "should always succeed");
200-
fnOp.setBuiltinAttr(mlir::UnitAttr::get(builder.getContext()));
200+
fnOp.setBuiltinAttr(mlir::UnitAttr::get(&getMLIRContext()));
201201
} else
202202
fnOp = cast<mlir::cir::FuncOp>(builtin);
203203

@@ -218,7 +218,7 @@ CIRGenFunction::buildCoroBeginBuiltinCall(mlir::Location loc,
218218
mlir::cir::FuncType::get({int32Ty, VoidPtrTy}, VoidPtrTy),
219219
/*FD=*/nullptr);
220220
assert(fnOp && "should always succeed");
221-
fnOp.setBuiltinAttr(mlir::UnitAttr::get(builder.getContext()));
221+
fnOp.setBuiltinAttr(mlir::UnitAttr::get(&getMLIRContext()));
222222
} else
223223
fnOp = cast<mlir::cir::FuncOp>(builtin);
224224

@@ -239,7 +239,7 @@ mlir::cir::CallOp CIRGenFunction::buildCoroEndBuiltinCall(mlir::Location loc,
239239
mlir::cir::FuncType::get({VoidPtrTy, boolTy}, boolTy),
240240
/*FD=*/nullptr);
241241
assert(fnOp && "should always succeed");
242-
fnOp.setBuiltinAttr(mlir::UnitAttr::get(builder.getContext()));
242+
fnOp.setBuiltinAttr(mlir::UnitAttr::get(&getMLIRContext()));
243243
} else
244244
fnOp = cast<mlir::cir::FuncOp>(builtin);
245245

@@ -254,7 +254,7 @@ CIRGenFunction::buildCoroutineBody(const CoroutineBodyStmt &S) {
254254

255255
auto Fn = dyn_cast<mlir::cir::FuncOp>(CurFn);
256256
assert(Fn && "other callables NYI");
257-
Fn.setCoroutineAttr(mlir::UnitAttr::get(builder.getContext()));
257+
Fn.setCoroutineAttr(mlir::UnitAttr::get(&getMLIRContext()));
258258
auto coroId = buildCoroIDBuiltinCall(openCurlyLoc, nullPtrCst);
259259
createCoroData(*this, CurCoro, coroId);
260260

‎clang/lib/CIR/CodeGen/CIRGenDecl.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -337,7 +337,7 @@ void CIRGenFunction::buildAutoVarInit(const AutoVarEmission &emission) {
337337
assert(allocaOp && "Address should come straight out of the alloca");
338338

339339
if (!allocaOp.use_empty())
340-
allocaOp.setInitAttr(mlir::UnitAttr::get(builder.getContext()));
340+
allocaOp.setInitAttr(mlir::UnitAttr::get(&getMLIRContext()));
341341
return;
342342
}
343343

@@ -595,7 +595,7 @@ mlir::cir::GlobalOp CIRGenFunction::addInitializerToStaticVarDecl(
595595
// Given those constraints, thread in the GetGlobalOp and update it
596596
// directly.
597597
GVAddr.getAddr().setType(
598-
mlir::cir::PointerType::get(builder.getContext(), Init.getType()));
598+
mlir::cir::PointerType::get(&getMLIRContext(), Init.getType()));
599599
OldGV->erase();
600600
}
601601

‎clang/lib/CIR/CodeGen/CIRGenException.cpp

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -708,7 +708,7 @@ mlir::Operation *CIRGenFunction::buildLandingPad(mlir::cir::TryOp tryOp) {
708708
assert(!(hasCatchAll && hasFilter));
709709
if (hasCatchAll) {
710710
// Attach the catch_all region. Can't coexist with an unwind one.
711-
auto catchAll = mlir::cir::CatchAllAttr::get(builder.getContext());
711+
auto catchAll = mlir::cir::CatchAllAttr::get(&getMLIRContext());
712712
clauses.push_back(catchAll);
713713

714714
// If we have an EH filter, we need to add those handlers in the
@@ -729,13 +729,12 @@ mlir::Operation *CIRGenFunction::buildLandingPad(mlir::cir::TryOp tryOp) {
729729
// If there's no catch_all, attach the unwind region. This needs to be the
730730
// last region in the TryOp operation catch list.
731731
if (!hasCatchAll) {
732-
auto catchUnwind = mlir::cir::CatchUnwindAttr::get(builder.getContext());
732+
auto catchUnwind = mlir::cir::CatchUnwindAttr::get(&getMLIRContext());
733733
clauses.push_back(catchUnwind);
734734
}
735735

736736
// Add final array of clauses into TryOp.
737-
tryOp.setCatchTypesAttr(
738-
mlir::ArrayAttr::get(builder.getContext(), clauses));
737+
tryOp.setCatchTypesAttr(mlir::ArrayAttr::get(&getMLIRContext(), clauses));
739738
}
740739

741740
// In traditional LLVM codegen. this tells the backend how to generate the

‎clang/lib/CIR/CodeGen/CIRGenExpr.cpp

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -629,7 +629,7 @@ void CIRGenFunction::buildStoreOfScalar(mlir::Value value, Address addr,
629629
const VarDecl *VD = currVarDecl;
630630
assert(VD && "VarDecl expected");
631631
if (VD->hasInit())
632-
SrcAlloca.setInitAttr(mlir::UnitAttr::get(builder.getContext()));
632+
SrcAlloca.setInitAttr(mlir::UnitAttr::get(&getMLIRContext()));
633633
}
634634

635635
assert(currSrcLoc && "must pass in source location");
@@ -1284,7 +1284,7 @@ LValue CIRGenFunction::buildUnaryOpLValue(const UnaryOperator *E) {
12841284
// Tag 'load' with deref attribute.
12851285
if (auto loadOp =
12861286
dyn_cast<::mlir::cir::LoadOp>(Addr.getPointer().getDefiningOp())) {
1287-
loadOp.setIsDerefAttr(mlir::UnitAttr::get(builder.getContext()));
1287+
loadOp.setIsDerefAttr(mlir::UnitAttr::get(&getMLIRContext()));
12881288
}
12891289

12901290
LValue LV = LValue::makeAddr(Addr, T, BaseInfo);
@@ -1495,15 +1495,14 @@ RValue CIRGenFunction::buildCall(clang::QualType CalleeType,
14951495
// get non-variadic function type
14961496
CalleeTy = mlir::cir::FuncType::get(CalleeTy.getInputs(),
14971497
CalleeTy.getReturnType(), false);
1498-
auto CalleePtrTy =
1499-
mlir::cir::PointerType::get(builder.getContext(), CalleeTy);
1498+
auto CalleePtrTy = mlir::cir::PointerType::get(&getMLIRContext(), CalleeTy);
15001499

15011500
auto *Fn = Callee.getFunctionPointer();
15021501
mlir::Value Addr;
15031502
if (auto funcOp = llvm::dyn_cast<mlir::cir::FuncOp>(Fn)) {
15041503
Addr = builder.create<mlir::cir::GetGlobalOp>(
15051504
getLoc(E->getSourceRange()),
1506-
mlir::cir::PointerType::get(builder.getContext(),
1505+
mlir::cir::PointerType::get(&getMLIRContext(),
15071506
funcOp.getFunctionType()),
15081507
funcOp.getSymName());
15091508
} else {
@@ -2673,7 +2672,7 @@ mlir::LogicalResult CIRGenFunction::buildIfOnBoolExpr(const Expr *cond,
26732672
// one fused location that has either 2 or 4 total locations, depending
26742673
// on else's availability.
26752674
auto getStmtLoc = [this](const Stmt &s) {
2676-
return mlir::FusedLoc::get(builder.getContext(),
2675+
return mlir::FusedLoc::get(&getMLIRContext(),
26772676
{getLoc(s.getSourceRange().getBegin()),
26782677
getLoc(s.getSourceRange().getEnd())});
26792678
};
@@ -2714,7 +2713,7 @@ mlir::cir::IfOp CIRGenFunction::buildIfOnBoolExpr(
27142713
SmallVector<mlir::Location, 2> ifLocs{thenLoc};
27152714
if (elseLoc)
27162715
ifLocs.push_back(*elseLoc);
2717-
auto loc = mlir::FusedLoc::get(builder.getContext(), ifLocs);
2716+
auto loc = mlir::FusedLoc::get(&getMLIRContext(), ifLocs);
27182717

27192718
// Emit the code with the fully general case.
27202719
mlir::Value condV = buildOpOnBoolExpr(loc, cond);
@@ -2823,7 +2822,7 @@ mlir::Value CIRGenFunction::buildAlloca(StringRef name, mlir::Type ty,
28232822
/*var type*/ ty, name, alignIntAttr, arraySize);
28242823
if (currVarDecl) {
28252824
auto alloca = cast<mlir::cir::AllocaOp>(addr.getDefiningOp());
2826-
alloca.setAstAttr(ASTVarDeclAttr::get(builder.getContext(), currVarDecl));
2825+
alloca.setAstAttr(ASTVarDeclAttr::get(&getMLIRContext(), currVarDecl));
28272826
}
28282827
}
28292828
return addr;
@@ -2903,8 +2902,8 @@ mlir::Value CIRGenFunction::buildLoadOfScalar(Address addr, bool isVolatile,
29032902

29042903
auto Ptr = addr.getPointer();
29052904
if (mlir::isa<mlir::cir::VoidType>(ElemTy)) {
2906-
ElemTy = mlir::cir::IntType::get(builder.getContext(), 8, true);
2907-
auto ElemPtrTy = mlir::cir::PointerType::get(builder.getContext(), ElemTy);
2905+
ElemTy = mlir::cir::IntType::get(&getMLIRContext(), 8, true);
2906+
auto ElemPtrTy = mlir::cir::PointerType::get(&getMLIRContext(), ElemTy);
29082907
Ptr = builder.create<mlir::cir::CastOp>(loc, ElemPtrTy,
29092908
mlir::cir::CastKind::bitcast, Ptr);
29102909
}

‎clang/lib/CIR/CodeGen/CIRGenExprConst.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2051,4 +2051,4 @@ static mlir::TypedAttr buildNullConstant(CIRGenModule &CGM,
20512051
mlir::TypedAttr
20522052
CIRGenModule::buildNullConstantForBase(const CXXRecordDecl *Record) {
20532053
return ::buildNullConstant(*this, Record, false);
2054-
}
2054+
}

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