Lowered LLVM is preventing inlining

[bcardosolopes]

In clang/test/CIR/CodeGen/tbaa-vptr.cpp:

The LLVM IR produced by OG is as follows:

define dso_local void @_ZN1BD0Ev(ptr noundef nonnull align 8 dereferenceable(9) initializes((0, 8)) %this) unnamed_addr #0 align 2 {
entry:
  store ptr getelementptr inbounds nuw inrange(-16, 16) (i8, ptr @_ZTV1B, i64 16), ptr %this, align 8, !tbaa !5
  %0 = getelementptr inbounds nuw i8, ptr %this, i64 8
  tail call void @_ZN6MemberD1Ev(ptr noundef nonnull align 1 dereferenceable(1) %0) #3
  tail call void @_ZN1AD2Ev(ptr noundef nonnull align 8 dereferenceable(9) %this) #3
  tail call void @_ZdlPvm(ptr noundef %this, i64 noundef 16) #4
  ret void
}

In contrast, the LLVM IR generated by ClangIR is as follows:

define dso_local void @_ZN1BD0Ev(ptr %0) #1 {
  tail call void @_ZN1BD1Ev(ptr %0) #0
  tail call void @_ZdlPvm(ptr %0, i64 16)
  ret void
}

Is there something missing in the ClangIR?

Originally posted by @PikachuHyA in #1463 (comment)

[AdUhTkJm]

The behaviour seems to be correct, just that the destructor is not inlined. It might be more obvious if we demangle the names.

This is simplified output from OG with -O0:

; non-deleting destructor
define dso_local void @B::~B()(ptr %0) {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8
  %3 = load ptr, ptr %2, align 8
  store ptr getelementptr ({ [4 x ptr] }, ptr @vtable for B, i32 0, i32 0, i32 2), ptr %3
  %4 = getelementptr i8, ptr %3, i64 8
  call void @Member::~Member()(ptr %4)
  call void @A::~A()(ptr %3)
  ret void
}

; deleting destructor
define dso_local void @B::~B()(ptr %0) {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8
  %3 = load ptr, ptr %2, align 8
  call void @B::~B()(ptr %3) ; this is the non-deleting one
  call void @operator delete(void*, unsigned long)(ptr %3, i64 16)
  ret void
}

As we can see, the OG output in the example comes from inlining the non-deleting destructor into the deleting one:

define dso_local void @_ZN1BD0Ev(ptr %this) {
entry:
  store ptr getelementptr (i8, ptr @_ZTV1B, i64 16), ptr %this, align 8
  %0 = getelementptr inbounds nuw i8, ptr %this, i64 8
  tail call void @_ZN6MemberD1Ev(ptr %0) ; Member::~Member()
  tail call void @_ZN1AD2Ev(ptr %this) ; A::~A()
  tail call void @_ZdlPvm(ptr %this, i64 16) ; operator delete(void *, unsigned long)
  ret void
}

While the Clang IR one does not perform the inline:

define dso_local void @_ZN1BD0Ev(ptr %0) #1 {
  tail call void @_ZN1BD1Ev(ptr %0) ; B::~B(), which is the non-deleting one
  tail call void @_ZdlPvm(ptr %0, i64 16) ; operator delete(void *, unsigned long)
  ret void
}

(cc @PikachuHyA)

[bcardosolopes]

Thanks for checking. Seems like CIR -> LLVM lowering is probably lacking some attributes that would make the inliner kick in - the idea is that LLVM should be able to continue doing same opts after lowered to CIR.

[yimdx]

I would like to work on this to learn ClangIR!

[siya100]

hey @bcardosolopes i want to work on this issue to delve into ClangIR

[bcardosolopes]

I'm fine with whoever submits the PR, thanks!

[ahmedshakill]

Hi @bcardosolopes. I had a chance to look at this. Here's what I found
;TLDR: Maybe I am missing something. But I find the issue to be non-existent. Separately for -O0 and -O1 , CIR and OG generate equivalent IR.

OG with -O0

define dso_local void @_ZN1BD2Ev(ptr noundef nonnull align 8 dereferenceable(9) %this) unnamed_addr #0 align 2 {
entry:
  %this.addr = alloca ptr, align 8
  store ptr %this, ptr %this.addr, align 8
  %this1 = load ptr, ptr %this.addr, align 8
  store ptr getelementptr inbounds inrange(-16, 16) ({ [4 x ptr] }, ptr @_ZTV1B, i32 0, i32 0, i32 2), ptr %this1, align 8
  %0 = getelementptr inbounds i8, ptr %this1, i64 8
  call void @_ZN6MemberD1Ev(ptr noundef nonnull align 1 dereferenceable(1) %0) #3
  call void @_ZN1AD2Ev(ptr noundef nonnull align 8 dereferenceable(8) %this1) #3
  ret void
}

define dso_local void @_ZN1BD1Ev(ptr noundef nonnull align 8 dereferenceable(9) %this) unnamed_addr #0 align 2 {
entry:
  %this.addr = alloca ptr, align 8
  store ptr %this, ptr %this.addr, align 8
  %this1 = load ptr, ptr %this.addr, align 8
  call void @_ZN1BD2Ev(ptr noundef nonnull align 8 dereferenceable(9) %this1) #3
  ret void
}

; Function Attrs: mustprogress noinline nounwind optnone
define dso_local void @_ZN1BD0Ev(ptr noundef nonnull align 8 dereferenceable(9) %this) unnamed_addr #0 align 2 {
entry:
  %this.addr = alloca ptr, align 8
  store ptr %this, ptr %this.addr, align 8
  %this1 = load ptr, ptr %this.addr, align 8
  call void @_ZN1BD1Ev(ptr noundef nonnull align 8 dereferenceable(9) %this1) #3
  call void @_ZdlPvm(ptr noundef %this1, i64 noundef 16) #4
  ret void
}

OG with -O1, inlines _ZN1BD2Ev inside _ZN1BD1Ev

define dso_local void @_ZN1BD1Ev(ptr noundef nonnull align 8 dereferenceable(9) initializes((0, 8)) %this) unnamed_addr #0 align 2 {
entry:
  store ptr getelementptr inbounds nuw inrange(-16, 16) (i8, ptr @_ZTV1B, i64 16), ptr %this, align 8, !tbaa !2
  %0 = getelementptr inbounds nuw i8, ptr %this, i64 8
  tail call void @_ZN6MemberD1Ev(ptr noundef nonnull align 1 dereferenceable(1) %0) #3
  tail call void @_ZN1AD2Ev(ptr noundef nonnull align 8 dereferenceable(9) %this) #3
  ret void
}

; Function Attrs: mustprogress nounwind
define dso_local void @_ZN1BD0Ev(ptr noundef nonnull align 8 dereferenceable(9) initializes((0, 8)) %this) unnamed_addr #0 align 2 {
entry:
  store ptr getelementptr inbounds nuw inrange(-16, 16) (i8, ptr @_ZTV1B, i64 16), ptr %this, align 8, !tbaa !2
  %0 = getelementptr inbounds nuw i8, ptr %this, i64 8
  tail call void @_ZN6MemberD1Ev(ptr noundef nonnull align 1 dereferenceable(1) %0) #3
  tail call void @_ZN1AD2Ev(ptr noundef nonnull align 8 dereferenceable(9) %this) #3
  tail call void @_ZdlPvm(ptr noundef %this, i64 noundef 16) #4
  ret void
}

CIR with -O0

; Function Attrs: nounwind
declare !dbg !3 void @_ZN6MemberD1Ev(ptr) #0

; Function Attrs: nounwind
declare !dbg !6 void @_ZN1AD2Ev(ptr) #0

; Function Attrs: noinline nounwind optnone
define void @_ZN1BD2Ev(ptr %0) #1 !dbg !7 {
  %2 = alloca ptr, i64 1, align 8, !dbg !8
  store ptr %0, ptr %2, align 8, !dbg !9
  %3 = load ptr, ptr %2, align 8, !dbg !10
  store ptr getelementptr inbounds nuw (i8, ptr @_ZTV1B, i64 16), ptr %3, align 8, !dbg !11
  %4 = getelementptr %struct.B, ptr %3, i32 0, i32 1, !dbg !12
  call void @_ZN6MemberD1Ev(ptr %4), !dbg !13
  call void @_ZN1AD2Ev(ptr %3), !dbg !14
  ret void, !dbg !15
}

; Function Attrs: noinline nounwind optnone
define void @_ZN1BD1Ev(ptr %0) #1 !dbg !16 {
  %2 = alloca ptr, i64 1, align 8, !dbg !17
  store ptr %0, ptr %2, align 8, !dbg !18
  %3 = load ptr, ptr %2, align 8, !dbg !19
  call void @_ZN1BD2Ev(ptr %3), !dbg !20
  ret void, !dbg !21
}

; Function Attrs: nounwind
declare !dbg !22 void @_ZdlPvm(ptr, i64) #0

; Function Attrs: noinline nounwind optnone
define void @_ZN1BD0Ev(ptr %0) #1 !dbg !23 {
  %2 = alloca ptr, i64 1, align 8, !dbg !24
  store ptr %0, ptr %2, align 8, !dbg !25
  %3 = load ptr, ptr %2, align 8, !dbg !26
  call void @_ZN1BD1Ev(ptr %3), !dbg !27
  call void @_ZdlPvm(ptr %3, i64 16), !dbg !28
  ret void, !dbg !29
}

CIR with -O1, Inlines BD2 inside BD1

; Function Attrs: nounwind
declare !dbg !3 void @_ZN6MemberD1Ev(ptr) local_unnamed_addr #0

; Function Attrs: nounwind
declare !dbg !6 void @_ZN1AD2Ev(ptr) local_unnamed_addr #0

; Function Attrs: nounwind
define void @_ZN1BD2Ev(ptr initializes((0, 8)) %0) local_unnamed_addr #0 !dbg !7 {
  store ptr getelementptr inbounds nuw (i8, ptr @_ZTV1B, i64 16), ptr %0, align 8, !dbg !8, !tbaa !9
  %2 = getelementptr i8, ptr %0, i64 8, !dbg !12
  tail call void @_ZN6MemberD1Ev(ptr %2), !dbg !13
  tail call void @_ZN1AD2Ev(ptr nonnull %0), !dbg !14
  ret void, !dbg !15
}

; Function Attrs: nounwind
define void @_ZN1BD1Ev(ptr initializes((0, 8)) %0) #0 !dbg !16 {
  store ptr getelementptr inbounds nuw (i8, ptr @_ZTV1B, i64 16), ptr %0, align 8, !dbg !17, !tbaa !9
  %2 = getelementptr i8, ptr %0, i64 8, !dbg !19
  tail call void @_ZN6MemberD1Ev(ptr %2), !dbg !20
  tail call void @_ZN1AD2Ev(ptr nonnull %0), !dbg !21
  ret void, !dbg !22
}

; Function Attrs: nounwind
declare !dbg !23 void @_ZdlPvm(ptr, i64) local_unnamed_addr #0

; Function Attrs: nounwind
define void @_ZN1BD0Ev(ptr initializes((0, 8)) %0) #0 !dbg !24 {
  store ptr getelementptr inbounds nuw (i8, ptr @_ZTV1B, i64 16), ptr %0, align 8, !dbg !25, !tbaa !9
  %2 = getelementptr i8, ptr %0, i64 8, !dbg !28
  tail call void @_ZN6MemberD1Ev(ptr %2), !dbg !29
  tail call void @_ZN1AD2Ev(ptr nonnull %0), !dbg !30
  tail call void @_ZdlPvm(ptr %0, i64 16), !dbg !31
  ret void, !dbg !32
}

I find the above to be expected behavior. One extra thing I noticed is, CIR generated with and without the flag -triple are different. When lowered from cir to llvmir some aliasing info doesn't get lowered. Like this,

In cir

cir.func private @_ZN1BD1Ev(!cir.ptr<!ty_B>) alias(@_ZN1BD2Ev) loc(#loc15)

lowered to LLVMDialect

llvm.func @_ZN1BD1Ev(!llvm.ptr) attributes {aliasee = @_ZN1BD2Ev, cir.extra_attrs = #fn_attr2, global_visibility = #cir<visibility default>, sym_visibility = "private"}

lowered to LLVMIR, _ZN1BD1Ev is not defined or aliased

; Function Attrs: nounwind
declare !dbg !4 void @_ZN6MemberD1Ev(ptr) #0

; Function Attrs: nounwind
declare !dbg !7 void @_ZN1AD2Ev(ptr) #0

; Function Attrs: nounwind uwtable
define void @_ZN1BD2Ev(ptr %0) #1 !dbg !8 {
  %2 = alloca ptr, i64 1, align 8, !dbg !9
  store ptr %0, ptr %2, align 8, !dbg !10
  %3 = load ptr, ptr %2, align 8, !dbg !11
  store ptr getelementptr inbounds nuw (i8, ptr @_ZTV1B, i64 16), ptr %3, align 8, !dbg !12, !tbaa !13
  %4 = getelementptr %struct.B, ptr %3, i32 0, i32 1, !dbg !16
  call void @_ZN6MemberD1Ev(ptr %4), !dbg !17
  call void @_ZN1AD2Ev(ptr %3), !dbg !18
  ret void, !dbg !19
}

declare !dbg !20 void @_ZN1BD1Ev(ptr)

; Function Attrs: nounwind
declare !dbg !21 void @_ZdlPvm(ptr, i64) #0

; Function Attrs: nounwind uwtable
define void @_ZN1BD0Ev(ptr %0) #1 !dbg !22 {
  %2 = alloca ptr, i64 1, align 8, !dbg !23
  store ptr %0, ptr %2, align 8, !dbg !24
  %3 = load ptr, ptr %2, align 8, !dbg !25
  call void @_ZN1BD1Ev(ptr %3), !dbg !26
  call void @_ZdlPvm(ptr %3, i64 16), !dbg !27
  ret void, !dbg !28
}

[bcardosolopes]

@ahmedshakill sounds like we can close this then, thanks!