fixup! [rp] Add UART module

Author: salkinium

src/modm/platform/uart/rp/module.lb

@@ -57,6 +57,7 @@ def prepare(module, options):
         return False
 
     module.depends(
+        ":math:algorithm",
         ":platform:gpio",
         ":platform:clockgen",
         ":architecture:uart",

src/modm/platform/uart/rp/uart.cpp.in

@@ -57,7 +57,6 @@ void modm::platform::Uart{{ id }}::unreset()
 	Resets::unresetWait(RESETS_RESET_UART{{ id }}_BITS);
 }
 
-
 void
 modm::platform::Uart{{ id }}::writeBlocking(uint8_t data)
 {
@@ -67,10 +66,7 @@ modm::platform::Uart{{ id }}::writeBlocking(uint8_t data)
 void
 modm::platform::Uart{{ id }}::writeBlocking(const uint8_t *data, std::size_t length)
 {
-	while (length--)
-	{
-		writeBlocking(*data++);
-	}
+	while (length--) writeBlocking(*data++);
 }
 
 void
@@ -85,10 +81,7 @@ modm::platform::Uart{{ id }}::write(uint8_t data)
 {
 %% if options["buffer.tx"] <= fifo_size
 	// No software buffer necessary, use hardware buffer only.
-	if (tx_fifo_full())
-	{
-		return false;
-	}
+	if (tx_fifo_full()) return false;
 	uart{{ id }}_hw->dr = data;
 	return true;
 %% else
@@ -257,24 +250,26 @@ MODM_ISR(UART{{ id }}_IRQ)
 	uint32_t IValue = uart{{ id }}_hw->mis;
 	// clear
 	uart{{ id }}_hw->icr = IValue;
-	if (IValue & UART_UARTMIS_TXMIS_BITS) {
 %% if options["buffer.tx"] > fifo_size
+	if (IValue & UART_UARTMIS_TXMIS_BITS)
+	{
 		while (!txBuffer.isEmpty() and !tx_fifo_full())
 		{
 			// Write to the hardware buffer
 			uart{{ id }}_hw->dr = txBuffer.get();
 			txBuffer.pop();
 		}
-%% endif
 	}
-	if (IValue & UART_UARTMIS_RXMIS_BITS) {
+%% endif
 %% if options["buffer.rx"] > fifo_size
+	if (IValue & UART_UARTMIS_RXMIS_BITS)
+	{
 		while(!rx_fifo_empty()) {
 			rxBuffer.push(uart{{ id }}_hw->dr);
 		}
 		if (rxBuffer.isFull()) {
 			uart{{ id }}_hw->imsc &= ~UART_UARTIMSC_RXIM_BITS;
 		}
-%% endif
 	}
+%% endif
 }

src/modm/platform/uart/rp/uart.hpp.in

@@ -14,6 +14,7 @@
 #include <modm/architecture/interface/uart.hpp>
 #include <modm/platform/core/peripherals.hpp>
 #include <modm/platform/gpio/connector.hpp>
+#include <modm/math/algorithm/prescaler.hpp>
 
 #include <hardware/structs/uart.h>
 
@@ -51,14 +52,30 @@ public:
 	static constexpr size_t TxBufferSize = {{ options["buffer.tx"] }};
 
 public:
-
-	enum class Parity : uint32_t
+	enum class
+	Parity : uint32_t
 	{
-		Even		= 2,
-		Odd			= 1,
+		Even		= UART_UARTLCR_H_PEN_BITS | UART_UARTLCR_H_EPS_BITS,
+		Odd			= UART_UARTLCR_H_PEN_BITS,
 		Disabled	= 0,
 	};
 
+	enum class
+	WordLength : uint32_t
+	{
+		Bit5 = 0 << UART_UARTLCR_H_WLEN_LSB,
+		Bit6 = 1 << UART_UARTLCR_H_WLEN_LSB,
+		Bit7 = 2 << UART_UARTLCR_H_WLEN_LSB,
+		Bit8 = 3 << UART_UARTLCR_H_WLEN_LSB,
+	};
+
+	enum class
+	StopBits : uint32_t
+	{
+		Bit1 = 0,
+		Bit2 = UART_UARTLCR_H_STP2_BITS,
+	};
+
 	template< class... Signals >
 	static void
 	connect()
@@ -76,68 +93,62 @@ public:
 	static void reset();
 	static void unreset();
 
-	static void setFormat(uint8_t data_bits,uint8_t stop_bits,Parity parity) {
+	static void
+	setFormat(Parity parity, WordLength length, StopBits stop)
+	{
 		hw_write_masked(&uart{{ id }}_hw->lcr_h,
-				   ((data_bits - 5u) << UART_UARTLCR_H_WLEN_LSB) |
-				   ((stop_bits - 1u) << UART_UARTLCR_H_STP2_LSB) |
-				   ((parity != Parity::Disabled ? 1 : 0) << UART_UARTLCR_H_PEN_LSB) |
-				   ((parity == Parity::Even ? 1 : 0) << UART_UARTLCR_H_EPS_LSB),
-				   UART_UARTLCR_H_WLEN_BITS |
-				   UART_UARTLCR_H_STP2_BITS |
-				   UART_UARTLCR_H_PEN_BITS |
-				   UART_UARTLCR_H_EPS_BITS);
+				uint32_t(parity) | uint32_t(length) | uint32_t(stop),
+				UART_UARTLCR_H_WLEN_BITS | UART_UARTLCR_H_STP2_BITS |
+				UART_UARTLCR_H_PEN_BITS | UART_UARTLCR_H_EPS_BITS);
 	}
 
-	template< class SystemClock, baudrate_t baudrate >
-	static uint32_t setBaudrate() {
-		constexpr uint32_t baud_rate_div = (8 * SystemClock::PeriFrequency / baudrate);
-		constexpr uint32_t baud_ibrd = baud_rate_div >> 7;
-		uint32_t baud_fbrd;
-		if constexpr (baud_ibrd == 0) {
-			baud_ibrd = 1;
-			baud_fbrd = 0;
-		} else if constexpr (baud_ibrd >= 65535) {
-			baud_ibrd = 65535;
-			baud_fbrd = 0;
-		}  else {
-			baud_fbrd = ((baud_rate_div & 0x7f) + 1) / 2;
-		}
+	template< class SystemClock, baudrate_t baudrate, percent_t tolerance=pct(1) >
+	static baudrate_t
+	setBaudrate()
+	{
+		static_assert(baudrate * 16 <= SystemClock::PeriFrequency and
+					  SystemClock::PeriFrequency <= baudrate * 16 * 65535ull,
+				"SystemClock::PeriFrequency must be in the range [16 x baudrate, 16 x 65535 x baudrate].");
+		// 16.6 fractional baudrate generator with 16x oversampling
+		constexpr uint32_t min = (1ul << 7);
+		constexpr uint32_t max = (1ul << 22) - 1ul;
+		constexpr auto result = Prescaler::from_range(SystemClock::PeriFrequency*4, baudrate, min, max);
+		modm::PeripheralDriver::assertBaudrateInTolerance< result.frequency, baudrate, tolerance >();
 		// Load PL011's baud divisor registers
-		uart{{ id }}_hw->ibrd = baud_ibrd;
-		uart{{ id }}_hw->fbrd = baud_fbrd;
-
+		uart{{ id }}_hw->ibrd = result.prescaler >> 6;
+		uart{{ id }}_hw->fbrd = result.prescaler & 0x3f;
 		// PL011 needs a (dummy) line control register write to latch in the
 		// divisors. We don't want to actually change LCR contents here.
 		hw_set_bits(&uart{{ id }}_hw->lcr_h, 0);
-		// See datasheet
-		return (4 * SystemClock::PeriFrequency) / (64 * baud_ibrd + baud_fbrd);
+
+		return result.frequency;
 	}
+
 	template< class SystemClock, baudrate_t baudrate, percent_t tolerance=pct(1) >
-	static void inline
-	initialize()
+	static void
+	initialize(Parity parity=Parity::Disabled, WordLength length=WordLength::Bit8, StopBits stop=StopBits::Bit1)
 	{
 		reset();
 		unreset();
-		setBaudrate<SystemClock,baudrate>();
-		setFormat(8,1,Parity::Disabled);
+		setBaudrate<SystemClock, baudrate, tolerance>();
+		setFormat(parity, length, stop);
 		// Enable the UART, both TX and RX
 		uart{{ id }}_hw->cr = UART_UARTCR_UARTEN_BITS | UART_UARTCR_TXE_BITS | UART_UARTCR_RXE_BITS;
 		// Enable FIFOs
 		hw_set_bits(&uart{{ id }}_hw->lcr_h, UART_UARTLCR_H_FEN_BITS);
 		// Always enable DREQ signals -- no harm in this if DMA is not listening
 		uart{{ id }}_hw->dmacr = UART_UARTDMACR_TXDMAE_BITS | UART_UARTDMACR_RXDMAE_BITS;
 
-	%% if options["buffer.rx"] > fifo_size
+%% if options["buffer.rx"] > fifo_size
 		/* If RX buffering with more than {{ fifo_size }} bytes is requested a software queue
 		 * must be used for receiving. This involves the Rx Interrupt only. */
 		uart{{ id }}_hw->imsc = UART_UARTIMSC_RXIM_BITS;
-	%% endif
+%% endif
 
-	%% if options["buffer.tx"] > fifo_size or options["buffer.rx"] > fifo_size
+%% if options["buffer.tx"] > fifo_size or options["buffer.rx"] > fifo_size
 		/* Enable the UART Interrupt */
 		NVIC_EnableIRQ(UART{{ id }}_IRQ_IRQn);
-	%% endif
-
+%% endif
 	}
 
 	static void