[rp2040] bugfix

Author: andryblack

ext/hathach/tusb_port.cpp.in

@@ -40,6 +40,10 @@ tusb_get_device_serial(uint16_t *serial_str)
 		(uint32_t *)0x0080A00C, (uint32_t *)0x0080A040,
 		(uint32_t *)0x0080A044, (uint32_t *)0x0080A048
 	%% endif
+%% elif target.platform in ["rp"]
+		/* sysinfo CHIP_ID and GIT_REV */
+		((uint32_t *)0x40000000),((uint32_t *)0x40000040),
+		((uint32_t *)0x40000000),((uint32_t *)0x40000040),
 %% endif
 	};
 

ext/rp/pico.cpp.in

@@ -21,7 +21,7 @@ extern "C" void panic(const char *fmt, ...) {
 %% if with_debug
 	va_list va;
 	va_start(va, fmt);
-	modm::log::debug.vprintf(fmt, va);
+	modm::log::info.vprintf(fmt, va);
 	va_end(va);
 %% endif
 	modm_assert(0, "pico", "Pico-SDK panic!");

src/modm/board/rp_pico/board.hpp

@@ -41,8 +41,8 @@ struct SystemClock
 	{
 		ClockControl::disableResus();
 		ClockControl::enableExternalCrystal(XOSCFrequency);
-		ClockControl::disableAux(ClockControl::Clock::Sys);
-		ClockControl::disableAux(ClockControl::Clock::Ref);
+		ClockControl::disableAux<ClockControl::Clock::Sys>();
+		ClockControl::disableAux<ClockControl::Clock::Ref>();
 		// PLL SYS: 12MHz / 1 = 12MHz * 125 = 1500MHZ / 6 / 2 = 125MHz
 		ClockControl::init_pll<ClockControl::Pll::Sys,1,SysPLLMul,6,2>();
 		// PLL USB: 12MHz / 1 = 12MHz * 40  = 480 MHz / 5 / 2 =  48MHz
@@ -70,6 +70,7 @@ struct SystemClock
 	               CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLK_SYS,
 	               1 << 8);
 
+	    ClockControl::updateCoreFrequency<Frequency>();
 		return true;
 	}
 };

src/modm/platform/clock/rp/clocks.cpp.in

@@ -18,13 +18,15 @@
 #define PICO_XOSC_STARTUP_DELAY_MULTIPLIER 1
 #endif
 
+// CMSIS Core compliance
+constinit uint32_t modm_fastdata SystemCoreClock(modm::platform::ClockControl::BootFrequency);
+
 namespace modm::platform
 {
 constinit uint16_t modm_fastdata delay_fcpu_MHz(computeDelayMhz(ClockControl::BootFrequency));
 constinit uint16_t modm_fastdata delay_ns_per_loop(computeDelayNsPerLoop(ClockControl::BootFrequency));
 
 
-
 void ClockControl::enableExternalCrystal(uint32_t freq) {
     // Assumes 1-15 MHz input, checked above.
     xosc_hw->ctrl = XOSC_CTRL_FREQ_RANGE_VALUE_1_15MHZ;
@@ -45,12 +47,6 @@ static inline bool has_glitchless_mux(ClockControl::Clock clk_index) {
     return clk_index == ClockControl::Clock::Sys || clk_index == ClockControl::Clock::Ref;
 }
 
-void ClockControl::disableAux(Clock clk) {
-	hw_clear_bits(&clocks_hw->clk[uint32_t(clk)].ctrl, CLOCKS_CLK_SYS_CTRL_SRC_BITS);
-	while (clocks_hw->clk[uint32_t(clk)].selected != 0x1)
-        __NOP();
-}
-
 void ClockControl::configure(Clock clk,uint32_t src, uint32_t auxsrc, uint32_t div) {
 
 	clock_hw_t *clock = &clocks_hw->clk[uint32_t(clk)];
@@ -112,6 +108,5 @@ void ClockControl::configure(Clock clk,uint32_t src, uint32_t auxsrc, uint32_t d
     // Now that the source is configured, we can trust that the user-supplied
     // divisor is a safe value.
     clock->div = div;
-
 }
 }

src/modm/platform/clock/rp/clocks.hpp.in

@@ -53,6 +53,18 @@ namespace modm::platform
 			clocks_hw->resus.ctrl = 0;
 		}
 		static void enableExternalCrystal(uint32_t freq);
+		template <Clock clk>
+		static void disableAux() {
+			static_assert(clk == Clock::Ref or clk == Clock::Sys,"Only Sys and Ref clocks has aux");
+			if constexpr(clk == Clock::Sys) {
+				hw_clear_bits(&clocks_hw->clk[uint32_t(clk)].ctrl, CLOCKS_CLK_SYS_CTRL_SRC_BITS);
+			} else if constexpr(clk == Clock::Ref) {
+				hw_clear_bits(&clocks_hw->clk[uint32_t(clk)].ctrl, CLOCKS_CLK_REF_CTRL_SRC_BITS);
+			}
+			while (clocks_hw->clk[uint32_t(clk)].selected != 0x1)
+		        __NOP();
+		}
+
 		static void disableAux(Clock clk);
 		template <Pll pll_name,uint32_t refdiv,uint32_t pll_mul, uint32_t post_div1, uint32_t post_div2>
 		static void init_pll() {
@@ -98,5 +110,12 @@ namespace modm::platform
 		    hw_clear_bits(&pll->pwr, PLL_PWR_POSTDIVPD_BITS);
 		}
 		static void configure(Clock clk,uint32_t src, uint32_t auxsrc,uint32_t div8);
+		template< uint32_t Core_Hz >
+		static void updateCoreFrequency()
+		{
+			SystemCoreClock = Core_Hz;
+			delay_fcpu_MHz = computeDelayMhz(Core_Hz);
+			delay_ns_per_loop = computeDelayNsPerLoop(Core_Hz);
+		}
 	};
 }