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added setup_lec_sim for dmx512
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3 files changed

+6
-3
lines changed

3 files changed

+6
-3
lines changed

RTL_testcases/RTL_Benchmarks_Gap_Analysis/dmx512/raptor_run.sh

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -259,6 +259,9 @@ parse_cga exit 1; }
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else
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echo ""
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fi
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echo "setup_lec_sim">>raptor_tcl.tcl
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[ "$tool_name" = "iverilog" ] && echo "simulate gate icarus">>raptor_tcl.tcl || echo "simulate gate verilator">>raptor_tcl.tcl
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[ "$tool_name" = "iverilog" ] && echo "simulate pnr icarus">>raptor_tcl.tcl || echo "simulate pnr verilator">>raptor_tcl.tcl
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echo "sta">>raptor_tcl.tcl
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echo "power">>raptor_tcl.tcl
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echo "bitstream $bitstream">>raptor_tcl.tcl

RTL_testcases/RTL_Benchmarks_Gap_Analysis/dmx512/rtl/dmx512_tx/dmx_dpram.v

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ module dmx_dpram #(
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input [depth-1:0] a,
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input we,
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input [width-1:0] di,
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output reg [width-1:0] do,
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output reg [width-1:0] dout,
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input [depth-1:0] a2,
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input we2,
@@ -37,7 +37,7 @@ reg [width-1:0] ram[0:(1 << depth)-1];
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always @(posedge clk) begin
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if(we)
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ram[a] <= di;
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do <= ram[a];
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dout <= ram[a];
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if(we2)
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ram[a2] <= di2;
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do2 <= ram[a2];

RTL_testcases/RTL_Benchmarks_Gap_Analysis/dmx512/rtl/dmx512_tx/dmx_tx.v

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,7 @@ dmx_dpram channels(
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.a(csr_a[8:0]),
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.we(csr_channels_we),
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.di(csr_di[7:0]),
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.do(csr_do_channels[7:0]),
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.dout(csr_do_channels[7:0]),
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.a2(channel_a),
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.we2(1'b0),

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