treewide: Enable tracing in Verilator

Author: colluca

src/frontend/inst64/idma_inst64_top.sv

@@ -521,9 +521,9 @@ module idma_inst64_top #(
                 // We need to schedule the assignment into a safe region, otherwise
                 // `hart_id_i` won't have a value assigned at the beginning of the first
                 // delta cycle.
-                /* verilator lint_off STMTDLY */
+`ifndef VERILATOR
                 #0;
-                /* verilator lint_on STMTDLY */
+`endif
                 $sformat(trace_file, "dma_trace_%05x_%05x.log", hart_id_i, c);
             end
             // attach the tracer

util/mario/tracer.py

@@ -15,7 +15,6 @@
 // The tracer for the ${identifier} iDMA
 `define IDMA_TRACER_${identifier_cap}(__backend_inst, __out_f) <%text>\\</%text>
 `ifndef SYNTHESIS <%text>\\</%text>
-`ifndef VERILATOR <%text>\\</%text>
     initial begin : inital_tracer_${identifier} <%text>\\</%text>
         automatic bit first_iter = 1; <%text>\\</%text>
         automatic integer tf; <%text>\\</%text>
@@ -25,7 +24,9 @@
         automatic `IDMA_TRACER_MAX_TYPE busy [string]; <%text>\\</%text>
         automatic `IDMA_TRACER_MAX_TYPE bus [string]; <%text>\\</%text>
         automatic string trace; <%text>\\</%text>
+`ifndef VERILATOR <%text>\\</%text>
         #0; <%text>\\</%text>
+`endif <%text>\\</%text>
         tf = $fopen(__out_f, "w"); <%text>\\</%text>
         $display("[iDMA Tracer] Logging %s to %s", `"__backend_inst`", __out_f); <%text>\\</%text>
         forever begin <%text>\\</%text>
@@ -90,7 +91,6 @@
             end <%text>\\</%text>
         end <%text>\\</%text>
     end <%text>\\</%text>
-`endif <%text>\\</%text>
 `endif
 '''