Minor lint fixes for trailing spaces, gen_ labels, line length

Author: micprog

src/backend/tpl/idma_legalizer.sv.tpl

@@ -205,7 +205,7 @@ ${database[p]['max_beats_per_burst']} * StrbWidth > ${database[p]['page_size']}\
 
         .reduce_len_i      ( opt_tf_q.src_reduce_len ),
         .max_llen_i        ( opt_tf_q.src_max_llen   ),
-      
+
         .addr_i            ( r_tf_q.addr             ),
         .num_bytes_to_pb_o ( r_page_num_bytes_to_pb  )
     );
@@ -283,7 +283,7 @@ r_num_bytes_to_pb = r_page_num_bytes_to_pb;
 
         .reduce_len_i      ( opt_tf_q.dst_reduce_len ),
         .max_llen_i        ( opt_tf_q.dst_max_llen   ),
-      
+
         .addr_i            ( w_tf_q.addr             ),
         .num_bytes_to_pb_o ( w_page_num_bytes_to_pb  )
     );
@@ -488,7 +488,8 @@ w_num_bytes_to_pb = w_page_num_bytes_to_pb;
             };
             // determine shift amount
             if (CombinedShifter) begin
-                opt_tf_d.read_shift  = req_i.src_addr[OffsetWidth-1:0] - req_i.dst_addr[OffsetWidth-1:0];
+                opt_tf_d.read_shift  = req_i.src_addr[OffsetWidth-1:0] -
+                                       req_i.dst_addr[OffsetWidth-1:0];
                 opt_tf_d.write_shift = '0;
             end else begin
                 opt_tf_d.read_shift  =   req_i.src_addr[OffsetWidth-1:0];
@@ -606,7 +607,7 @@ ${database[protocol]['legalizer_write_data_path']}
     // only advance to next state if:
     // * rw_coupled: both machines advance
     // * rw_decoupled: either machine advances
- 
+
     always_comb begin : proc_legalizer_flow_control
         if ( opt_tf_q.decouple_rw\
         % if len(used_non_bursting_or_force_decouple_read_protocols) != 0:
@@ -645,7 +646,7 @@ ${database[protocol]['legalizer_write_data_path']}
             w_valid_o = w_tf_q.valid & r_ready_i & w_ready_i & !flush_i;
         end
     end
-    
+
     // load next idma request: if both machines are done!
     assign ready_o = r_done & w_done & r_ready_i & w_ready_i & !flush_i;
 

src/frontend/reg/tpl/idma_reg.sv.tpl

@@ -162,14 +162,14 @@ module idma_${identifier} #(
     end
 
     // observational registers
-    for (genvar c = 0; c < NumStreams; c++) begin
+    for (genvar c = 0; c < NumStreams; c++) begin : gen_hw2reg_connections
         assign dma_hw2reg[i].status[c]  = {midend_busy_i[c], busy_i[c]};
         assign dma_hw2reg[i].next_id[c] = next_id_i;
         assign dma_hw2reg[i].done_id[c] = done_id_i[c];
     end
 
     // tie-off unused channels
-    for (genvar c = NumStreams; c < MaxNumStreams; c++) begin
+    for (genvar c = NumStreams; c < MaxNumStreams; c++) begin : gen_hw2reg_unused
         assign dma_hw2reg[i].status[c]  = '0;
         assign dma_hw2reg[i].next_id[c] = '0;
         assign dma_hw2reg[i].done_id[c] = '0;

util/mario/legalizer.py

@@ -43,13 +43,13 @@ def render_legalizer(prot_ids: dict, db: dict, tpl_file: str) -> str:
         for rp in used_read_prots:
             # format DB entry
             read_meta = indent_block(db[rp]['legalizer_read_meta_channel'], 3 - srp, 4)
-            db[rp]['legalizer_read_meta_channel'] = read_meta
+            db[rp]['legalizer_read_meta_channel'] = read_meta[:read_meta.rfind('\n')]
 
         # Indent write meta channel and data path
         for wp in used_write_prots:
             # format DB entry
             write_meta = indent_block(db[wp]['legalizer_write_meta_channel'], 3 - swp, 4)
-            db[wp]['legalizer_write_meta_channel'] = write_meta
+            db[wp]['legalizer_write_meta_channel'] = write_meta[:write_meta.rfind('\n')]
             # if datapath exists
             if 'legalizer_write_data_path' in db[wp]:
                 # format DB entry