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Add example usage
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riscv-rt/src/lib.rs

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@@ -607,6 +607,40 @@
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//!
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//! It is expected that the custom code does not clobber any registers.
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//!
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//! ### Example
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//!
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//! ```rust,no_run
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//! core::arch::global_asm!(
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//! r#"
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//! .section .trap.start, "ax"
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//! .extern _pre_default_start_trap_ret
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//! .global _pre_default_start_trap
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//!
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//! // with the pre-default-start-trap feature enabled this code is executed before
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//! // the code in _default_start_trap
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//! _pre_default_start_trap:
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//! // move SP to some save place if it's pointing below the RAM
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//! // otherwise we won't be able to do anything reasonable
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//! // (since we don't have a useable stack otherwise)
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//! //
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//! // most probably we will just print something and halt in this case
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//! // we actually can't do anything else
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//! csrw mscratch, t0
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//! la t0, _dram_origin
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//! bge sp, t0, 1f
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//!
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//! // set SP to the start of the stack
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//! la sp, _stack_start
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//!
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//! 1:
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//! // remember to not clobber any registers, restore t0 from mscratch
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//! csrr t0, mscratch
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//!
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//! // jump back to continue with _default_start_trap
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//! j _pre_default_start_trap_ret
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//! "#
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//! );
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//! ```
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//! [attr-entry]: attr.entry.html
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//! [attr-exception]: attr.exception.html
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//! [attr-external-interrupt]: attr.external_interrupt.html

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