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  • Design notes are written for the phase-locked loop (PLL) in a similar manner as in the drives documentation. In order to provide links to grid-forming methods, the observer-based PLL approach is used. The documentation can be further updated later, including more detailed links to observer-based power synchronization.
  • In the code, the low-pass filtering of the measured PCC voltage is moved to the PLL.
  • Various minor refactoring and polishing.

@mhinkkan mhinkkan merged commit 4226c4d into Aalto-Electric-Drives:main Aug 25, 2024
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