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[CIR] Un-xfail variadic calls LLVM Premerge Checks #20: Commit e18fd1e pushed by AdUhTkJm
March 22, 2025 19:52 1s main
main
March 22, 2025 19:52 1s
[CIR] Un-xfail variadic calls LLVM Premerge Checks #19: Commit 7902be9 pushed by AdUhTkJm
March 22, 2025 19:51 1s main
main
March 22, 2025 19:51 1s
[CIR] Un-xfail variadic calls LLVM Premerge Checks #18: Commit 6d2e3c1 pushed by AdUhTkJm
March 22, 2025 15:04 1s main
main
March 22, 2025 15:04 1s
[CIR] Add support for nontemporal loads and stores (#1494) LLVM Premerge Checks #17: Commit 79d0d74 pushed by AdUhTkJm
March 18, 2025 12:58 1s main
main
March 18, 2025 12:58 1s
[CIR][CUDA} CallConvLowering for basic types in NVPTX LLVM Premerge Checks #16: Commit d1622d9 pushed by AdUhTkJm
March 14, 2025 10:16 1s main
main
March 14, 2025 10:16 1s
[CIR][CUDA} CallConvLowering for basic types in NVPTX LLVM Premerge Checks #15: Commit 04a435e pushed by AdUhTkJm
March 12, 2025 11:35 1s main
main
March 12, 2025 11:35 1s
[CIR][CUDA} CallConvLowering for basic types in NVPTX LLVM Premerge Checks #14: Commit 70af95d pushed by AdUhTkJm
March 12, 2025 09:13 1s main
main
March 12, 2025 09:13 1s
[CIR][CUDA} CallConvLowering for basic types in NVPTX LLVM Premerge Checks #13: Commit f994dc1 pushed by AdUhTkJm
March 12, 2025 09:08 1s main
main
March 12, 2025 09:08 1s
[CIR][CUDA} CallConvLowering for basic types in NVPTX LLVM Premerge Checks #12: Commit 01b8beb pushed by AdUhTkJm
March 11, 2025 22:30 1s main
main
March 11, 2025 22:30 1s
[CIR][CUDA} CallConvLowering for basic types in NVPTX LLVM Premerge Checks #11: Commit 41f78d0 pushed by AdUhTkJm
March 11, 2025 22:29 1s main
main
March 11, 2025 22:29 1s
[CIR][CUDA} CallConvLowering for basic types in NVPTX LLVM Premerge Checks #10: Commit e491754 pushed by AdUhTkJm
March 11, 2025 20:47 1s main
main
March 11, 2025 20:47 1s
[CIR][CUDA] Add target-specific attributes LLVM Premerge Checks #9: Commit 817cdb5 pushed by AdUhTkJm
March 8, 2025 09:02 1s main
main
March 8, 2025 09:02 1s
[CIR][CUDA] Add target-specific attributes LLVM Premerge Checks #8: Commit 20b56cd pushed by AdUhTkJm
March 8, 2025 09:01 1s main
main
March 8, 2025 09:01 1s
Merge branch 'main' into main LLVM Premerge Checks #7: Commit ad05a6b pushed by AdUhTkJm
March 8, 2025 08:53 1s main
main
March 8, 2025 08:53 1s
[CIR][CUDA] Add target-specific attributes LLVM Premerge Checks #6: Commit b42d179 pushed by AdUhTkJm
March 7, 2025 22:00 1s main
main
March 7, 2025 22:00 1s
[CIR] Fix attributes lowering for GlobalOp LLVM Premerge Checks #5: Commit f00d4a1 pushed by AdUhTkJm
March 6, 2025 17:05 2s main
main
March 6, 2025 17:05 2s
[CIR] Fix attributes lowering for GlobalOp LLVM Premerge Checks #4: Commit 2815b0d pushed by AdUhTkJm
March 6, 2025 14:41 2s main
main
March 6, 2025 14:41 2s
[CIR] Fix attributes lowering for GlobalOp LLVM Premerge Checks #3: Commit d0d3081 pushed by AdUhTkJm
March 6, 2025 14:40 2s main
main
March 6, 2025 14:40 2s
[CIR][CUDA] Lowering device and shared variables LLVM Premerge Checks #2: Commit cdef6c6 pushed by AdUhTkJm
March 4, 2025 13:10 2s main
main
March 4, 2025 13:10 2s
[CIR][CUDA] Fix destructor behaviour LLVM Premerge Checks #1: Commit 72e4006 pushed by AdUhTkJm
March 1, 2025 10:44 2s main
main
March 1, 2025 10:44 2s