mikroSDK-2.15.0

bsp/board/include/boards/clicker_ra4m1/board.h

@@ -49,10 +49,39 @@ extern "C"
 {
 #endif
 
+// Hardware revision number
+#define BOARD_REV_MAJOR (1)
+#define BOARD_REV_MINOR (01)
+
 #define BOARD_NAME "RA4M1 Clicker"
 
-// Mapping
-// Only Bare Metal support is available at the moment
+#include "mikrobus.h"
+
+/// Mapping
+#define MIKROBUS_1 1
+#define MIKROBUS_1_AN GPIO_P000
+#define MIKROBUS_1_RST GPIO_P407
+#define MIKROBUS_1_CS GPIO_P103
+#define MIKROBUS_1_SCK GPIO_P102
+#define MIKROBUS_1_MISO GPIO_P100
+#define MIKROBUS_1_MOSI GPIO_P101
+#define MIKROBUS_1_PWM GPIO_P107
+#define MIKROBUS_1_INT GPIO_P302
+#define MIKROBUS_1_RX GPIO_P410
+#define MIKROBUS_1_TX GPIO_P411
+#define MIKROBUS_1_SCL GPIO_P205
+#define MIKROBUS_1_SDA GPIO_P206
+
+// LEDs
+#define LED_1 GPIO_P409
+#define LED_2 GPIO_P408
+
+// Buttons
+#define BUTTON_1 GPIO_P304
+#define BUTTON_2 GPIO_P301
+
+#define USB_UART_TX HAL_PIN_NC
+#define USB_UART_RX HAL_PIN_NC
 
 #ifdef __cplusplus
 }

changelog/v2.15.0/changelog.md

@@ -0,0 +1,68 @@
+<p align="center">
+  <img src="http://www.mikroe.com/img/designs/beta/logo_small.png?raw=true" alt="MikroElektronika"/>
+</p>
+
+---
+
+**[BACK TO MAIN FILE](../../changelog.md)**
+
+---
+
+# `v2.15.0`
+
++ released: 2025-08-07
+
+## Changes
+
+- [`v2.15.0`](#v2150)
+  - [Changes](#changes)
+    - [RENESAS](#renesas)
+    - [Fixes](#fixes)
+      - [mikroSDK](#mikrosdk)
+    - [NEW HARDWARE](#new-hardware)
+
+### <font color=red>RENESAS</font>
+
+**RA4M1 MCUs supported!**
+
+|       MCU       |
+|  :------------: |
+|  R7FA4M1AB3CFP  |
+|  R7FA4M1AB2CLJ  |
+|  R7FA4M1AB3CFM  |
+|  R7FA4M1AB3CNB  |
+|  R7FA4M1AB3CFL  |
+|  R7FA4M1AB3CNE  |
+|  R7FA4M1AB3CNF  |
+
+**Supported modules:**
+
++ ADC (Full module support)
++ SPI (Full module support)
++ UART (Full module support)
++ I2C (Full module support)
++ PWM (Full module support)
++ GPIO (Full module support)
++ 1-Wire (Full module support)
+
+### Fixes
+
+#### mikroSDK
+
+- Fixed the build issue for MCUs STM32C011J6 and STM32C011J4
+  - Now setups with these MCUs can be successfully created
+- SPI transfer API is now also available for the 157 MCUs with AI generated SDK support
+- Minor fixes and improvements regarding the SPI transfer API implementation
+
+### NEW HARDWARE
+
+> NOTE:
+>> If any new hardware was added to current version, it will be listed here.
+
+Support added for following hardware:
+
+---
+
+**[BACK TO MAIN FILE](../../changelog.md)**
+
+---

cmake/utils.cmake

@@ -175,6 +175,8 @@ function(find_chip_architecture _chip_architecture)
             set(${_chip_architecture} "arm" PARENT_SCOPE)
         elseif(${MCU_NAME} MATCHES "^(AT)?SAM.*")
             set(${_chip_architecture} "arm" PARENT_SCOPE)
+        elseif(${MCU_NAME} MATCHES "^R7.*")
+            set(${_chip_architecture} "arm" PARENT_SCOPE)
         else()
             set(${_chip_architecture} "UNSUPPORTED_CHIP_SELECTED_FOR_FOLLOWING_IMPLEMENTATION" PARENT_SCOPE)
         endif()
@@ -616,7 +618,7 @@ endfunction()
 function(core_implementation_select mcu core_implementation)
     find_chip_architecture(chip_architecture)
     if(${chip_architecture} STREQUAL "arm")
-        if(${mcu} MATCHES "(^STM32.*)|(^MK.*)|(^TM4C.*)|(^(AT)?SAM.*)")
+        if(${mcu} MATCHES "(^STM32.*)|(^MK.*)|(^TM4C.*)|(^(AT)?SAM.*|(^R7F.+))")
             set(${core_implementation} "core/implementation_1/hal_ll_core.c" PARENT_SCOPE)
         else()
             set(${core_implementation} "core/implementation_2/hal_ll_core.c" PARENT_SCOPE)

drv/lib/src/lib_drv_spi_master/drv_spi_master.c

@@ -435,8 +435,8 @@ err_t spi_master_transfer( spi_master_t *obj, uint8_t *write_data_buffer,
     if ( _acquire( obj, false ) != ACQUIRE_FAIL ) {
         #if DRV_TO_HAL
         return hal_spi_master_transfer( &obj->handle, write_data_buffer,
-                                                        read_data_buffer,
-                                                        data_length );
+                                                      read_data_buffer,
+                                                      data_length );
         #else
         hal_spi_master_handle_register_t *hal_handle = ( hal_spi_master_handle_register_t* )hal_is_handle_null( (handle_t *)&obj->handle );
         err_t hal_status = HAL_SPI_MASTER_SUCCESS;
@@ -468,9 +468,9 @@ err_t spi_master_transfer( spi_master_t *obj, uint8_t *write_data_buffer,
             hal_handle->init_state = true;
         }
 
-        hal_status =  hal_spi_master_transfer( (handle_t *)&hal_handle, write_data_buffer,
-                                                                        read_data_buffer,
-                                                                        data_length );
+        hal_status =  hal_ll_spi_master_transfer( (handle_t *)&hal_handle, write_data_buffer,
+                                                                           read_data_buffer,
+                                                                           data_length );
 
         if (hal_status == HAL_SPI_MASTER_MODULE_ERROR)
         {

hal/interface/CMakeLists.txt

@@ -25,6 +25,8 @@ elseif(${MCU_NAME} MATCHES "(^MK(.+)$)")
     set(vendor_id "nxp")
 elseif(${MCU_NAME} MATCHES "(^TM4C1(.+)$)")
     set(vendor_id "tiva")
+elseif(${MCU_NAME} MATCHES "(^R7(.+)$)")
+    set(vendor_id "renesas")
 elseif(${MCU_NAME} MATCHES "(^PIC32(.+)$)")
     set(vendor_id "pic32")
 elseif(${MCU_NAME} MATCHES "(^PIC18(.+)$)")

manifest.json

@@ -3,5 +3,5 @@
     "display-name": "mikroSDK",
     "description": "MikroSDK 2.0 is an embedded software development framework designed to simplify and accelerate application development on Mikroe hardware platform, specifically for Click Boards and other extension board drivers, on a broad range of microcontroller vendors and architectures. It includes peripheral libraries and drivers, middleware, board support, and application layer libraries among others.",
     "icon": "images/icon-mikroSDK.png",
-    "manifest-version": "1.0.28"
+    "manifest-version": "1.0.29"
 }

platform/mikrosdk_version/include/mikrosdk_version.h

@@ -60,14 +60,14 @@ extern "C"{
   * @note changes in minor version indicate that there have been
   * significant improvements and/or features added
   */
-#define mikroSDK_MINOR_VERSION 14
+#define mikroSDK_MINOR_VERSION 15
 
 /**
   * @brief mikroSDK_PATCH_VERSION
   * @note changes in patch version indicate smaller updates,
   * bug fixes and improvements
   */
-#define mikroSDK_PATCH_VERSION 6
+#define mikroSDK_PATCH_VERSION 0
 
 /**
   * @brief mikroSDK_GET_VERSION

platform/ring/lib/src/ring.c

@@ -70,7 +70,11 @@ bool ring_buf8_push( ring_buf8_t *ring, uint8_t data_ )
 uint8_t ring_buf8_pop( ring_buf8_t *ring )
 {
     uint8_t result;
+
+    // GCC & Clang compiler files for Renesas are not included into the project.
+    #if ( vendor != renesas )
     assert( ring->size > 0 );
+    #endif
 
     result = ring->buffer[ ring->tail ];
     ring->tail = ( ring->tail + 1 ) % ring->capacity;

targets/arm/mikroe/CMakeLists.txt

@@ -6,6 +6,8 @@ elseif(${MCU_NAME} MATCHES "(^MK(.+)$)")
 elseif(${MCU_NAME} MATCHES "(^TM4C1(.+)$)")
     ## TIVA has only the 71 MCUs already implemented
     set(vendor_id "tiva")
+elseif(${MCU_NAME} MATCHES "(^R7(.+)$)")
+    set(vendor_id "renesas")
 elseif(${MCU_NAME} MATCHES "(^(AT)?SAM(.+)$)")
     set(vendor_id "sam")
 else()

targets/arm/mikroe/ai_generated/stm32/include/spi_master/hal_ll_spi_master.h

@@ -212,6 +212,31 @@ hal_ll_err_t hal_ll_spi_master_read( handle_t *handle, uint8_t *read_data_buffer
   */
 hal_ll_err_t hal_ll_spi_master_write_then_read( handle_t *handle, uint8_t *write_data_buffer, size_t length_write_data, uint8_t *read_data_buffer, size_t length_read_data );
 
+/**
+ * @brief Performs simultaneous write and read on SPI bus.
+ *
+ * Executes a full-duplex SPI transfer. While writing `write_data_buffer`,
+ * the incoming bytes from the SPI slave are placed into `read_data_buffer`.
+ * This function is suitable for devices that require simultaneous
+ * transmission and reception.
+ *
+ * @param[in]  handle HAL context object handle.
+ * @param[in]  write_data_buffer Pointer to data to be written to the bus.
+ * @param[out] read_data_buffer Pointer to buffer where read data will be stored.
+ * @param[in]  data_length Number of bytes to transfer.
+ *
+ * @return hal_ll_err_t Returns #HAL_LL_SPI_MASTER_SUCCESS on success,
+ *                      otherwise returns #HAL_LL_SPI_MASTER_MODULE_ERROR
+ *                      if handle is invalid or data_length is 0.
+ *
+ * @note This function assumes the SPI module is already initialized via
+ *       #hal_ll_spi_master_register_handle and #hal_ll_module_configure_spi.
+ */
+hal_ll_err_t hal_ll_spi_master_transfer( handle_t *handle,
+                                         uint8_t *write_data_buffer,
+                                         uint8_t *read_data_buffer,
+                                         size_t data_length );
+
 /**
  * @brief  Closes SPI Master HAL and HAL_LOW_LEVEL context object.
  *

targets/arm/mikroe/ai_generated/stm32/src/spi_master/implementations/doc_ds_1/hal_ll_spi_master.c

@@ -293,6 +293,29 @@ static void hal_ll_spi_master_write_bare_metal(hal_ll_spi_master_base_handle_t *
   */
 hal_ll_err_t hal_ll_spi_master_write_then_read(handle_t *handle, uint8_t *write_data_buffer, size_t length_write_data, uint8_t *read_data_buffer, size_t length_read_data);
 
+/**
+  * @brief  Perform a simultaneous write and read on the SPI Master bus.
+  *
+  * Function performs a full-duplex SPI transfer. Each written byte results in
+  * a received byte which is optionally stored in the read buffer.
+  * If the write buffer is NULL, the configured dummy byte will be transmitted.
+  * If the read buffer is NULL, the received data will be discarded.
+  *
+  * @param[in]  *map - Object specific context handler.
+  * @param[in]  *write_data_buffer - Pointer to write data buffer.
+  *                                  If NULL, dummy data will be used.
+  * @param[out] *read_data_buffer - Pointer to read data buffer.
+  *                                 If NULL, received data will be discarded.
+  * @param[in]  data_length - Number of bytes to be transferred.
+  *
+  * @note TX FIFO is flushed and re-enabled on each byte transfer to ensure proper behavior.
+  *       This implementation uses polling and is blocking.
+  */
+static void hal_ll_spi_master_transfer_bare_metal ( hal_ll_spi_master_hw_specifics_map_t *map,
+                                                    uint8_t *write_data_buffer,
+                                                    uint8_t *read_data_buffer,
+                                                    size_t data_length );
+
 /**
  * @brief  Maps new-found module specific values.
  *
@@ -408,6 +431,29 @@ hal_ll_err_t hal_ll_spi_master_write_then_read(handle_t *handle, uint8_t *write_
     return HAL_LL_SPI_MASTER_SUCCESS;
 }
 
+hal_ll_err_t hal_ll_spi_master_transfer(handle_t *handle,
+                                        uint8_t *write_data_buffer,
+                                        uint8_t *read_data_buffer,
+                                        size_t data_length) {
+    low_level_handle = hal_ll_spi_master_get_handle;
+    hal_ll_spi_master_hw_specifics_map_local = hal_ll_get_specifics(hal_ll_spi_master_get_module_state_address);
+
+    if (NULL == low_level_handle->hal_ll_spi_master_handle) {
+        return HAL_LL_SPI_MASTER_MODULE_ERROR;
+    }
+
+    if (!hal_ll_spi_master_hw_specifics_map_local || !data_length) {
+        return HAL_LL_SPI_MASTER_MODULE_ERROR;
+    }
+
+    hal_ll_spi_master_transfer_bare_metal(hal_ll_spi_master_hw_specifics_map_local,
+                                          write_data_buffer,
+                                          read_data_buffer,
+                                          data_length);
+
+    return HAL_LL_SPI_MASTER_SUCCESS;
+}
+
 uint32_t hal_ll_spi_master_set_speed(handle_t *handle, uint32_t speed) {
     // Get low level HAL handle.
     low_level_handle = hal_ll_spi_master_get_handle;
@@ -479,7 +525,7 @@ void hal_ll_spi_master_close(handle_t* handle) {
 
 // ----------------------------------------------- PRIVATE FUNCTION DEFINITIONS
 
-uint8_t hal_ll_spi_master_transfer_bare_metal(hal_ll_spi_master_base_handle_t *hal_ll_hw_reg, uint8_t data_buffer) {
+uint8_t hal_ll_spi_master_transfer_byte_bare_metal(hal_ll_spi_master_base_handle_t *hal_ll_hw_reg, uint8_t data_buffer) {
     // Write user-defined data ( 'hal_ll_spi_master_read_bare_metal' procedure will send dummy data ).
     *((volatile uint8_t *)&hal_ll_hw_reg->dr) = (uint8_t)data_buffer;    // 8-bit data
 
@@ -496,7 +542,7 @@ static void hal_ll_spi_master_write_bare_metal( hal_ll_spi_master_base_handle_t
     // Write the first data to be transmitted into the SPI_DR register.
     for(transfer_counter = 0; transfer_counter < write_data_length; transfer_counter++) {
         // If we are good to go ( if the tx buffer value has been shifted to the shift register ), write the data.
-        hal_ll_spi_master_transfer_bare_metal( hal_ll_hw_reg, write_data_buffer[transfer_counter]);
+        hal_ll_spi_master_transfer_byte_bare_metal( hal_ll_hw_reg, write_data_buffer[transfer_counter]);
     }
 }
 
@@ -506,7 +552,23 @@ static void hal_ll_spi_master_read_bare_metal(hal_ll_spi_master_base_handle_t *h
     // Read the first data to be transmitted into the SPI_DR register.
     for(transfer_counter = 0; transfer_counter < read_data_length; transfer_counter++) {
         // If we are good to go ( if the value from shift register has been shifted to the rx register ), read the data.
-         read_data_buffer[transfer_counter] = hal_ll_spi_master_transfer_bare_metal(hal_ll_hw_reg, dummy_data);
+        read_data_buffer[transfer_counter] = hal_ll_spi_master_transfer_byte_bare_metal(hal_ll_hw_reg, dummy_data);
+    }
+}
+
+static void hal_ll_spi_master_transfer_bare_metal ( hal_ll_spi_master_hw_specifics_map_t *map,
+                                                    uint8_t *write_data_buffer,
+                                                    uint8_t *read_data_buffer,
+                                                    size_t data_length ) {
+    hal_ll_spi_master_base_handle_t *hal_ll_hw_reg = (hal_ll_spi_master_base_handle_t *)map->base;
+
+    for (size_t i = 0; i < data_length; i++) {
+        uint8_t tx_data = write_data_buffer ? write_data_buffer[i] : map->dummy_data;
+        uint8_t rx_data = hal_ll_spi_master_transfer_byte_bare_metal(hal_ll_hw_reg, tx_data);
+
+        if (read_data_buffer) {
+            read_data_buffer[i] = rx_data;
+        }
     }
 }