A simple CMOS Inverter implemented on AMD Vivado & Cadence Virtuoso tool
A CMOS inverter is a fundamental logic gate in digital circuits, built using a p-channel (PMOS) and an n-channel (NMOS) MOSFET in a complementary configuration. It functions as a NOT gate, inverting the input signal.
- Input = High (1) → NMOS conducts, PMOS is off → Output = Low (0)
- Input = Low (0) → PMOS conducts, NMOS is off → Output = High (1)
- DC Analysis - Identifies logic threshold, noise margins, and output swing.
- Transient Analysis - Measures rise time, fall time, and propagation delays (tpdr, tpdf, tpd)
- Parametric Analysis - Evaluates how changes in load or device size affect delay, gain, and power
- Corner Analysis - Ensures functionality across worst-case PVT (Process, Voltage, Temperature) conditions