This project enhances a revised single cycle datapath with seven new instructions:
lwnor (R-type) - lwnor $rd, $rs, $rt, shamt
bnem (R-type) - bnem $rd, $rs, $rt, shamt
cmpeq (R-type) - cmpeq $rd, $rs, $rt
blti (I-type) - blti $rs, $rt, imm
cmpgi (I-type) - cmpgi $rs, $rt, imm
pop (I-type) - pop $rt
bv (J-type) - bv Target
Implementations made in Verilog.