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hpdcache: update submodule
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3 files changed

+6
-3
lines changed

3 files changed

+6
-3
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.gitlab-ci/scripts/report_benchmark.py

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -23,9 +23,9 @@
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"dhrystone_single": 22256,
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"coremark_dual": 981777,
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"coremark_single": 1294524,
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"dhrystone_cv32a65x": 28822,
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"dhrystone_cv32a65x": 28823,
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"dhrystone_cv32a60x": 36629,
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}
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for arg in sys.argv[1:]:
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if "--dhrystone" in arg or "--coremark" in arg:

core/cache_subsystem/cva6_hpdcache_subsystem.sv

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -211,6 +211,8 @@ module cva6_hpdcache_subsystem
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userCfg.mshrSetsPerRam = CVA6Cfg.NrLoadBufEntries < 16 ? 1 : CVA6Cfg.NrLoadBufEntries / 2;
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userCfg.mshrRamByteEnable = 1'b1;
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userCfg.mshrUseRegbank = (CVA6Cfg.NrLoadBufEntries < 16);
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/*FIXME we should add additional CVA6 config parameters (cbufEntries)*/
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userCfg.cbufEntries = 4;
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userCfg.refillCoreRspFeedthrough = 1'b1;
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userCfg.refillFifoDepth = 2 * (CVA6Cfg.DCACHE_LINE_WIDTH / CVA6Cfg.AxiDataWidth);
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userCfg.wbufDirEntries = CVA6Cfg.WtDcacheWbufDepth;
@@ -231,6 +233,7 @@ module cva6_hpdcache_subsystem
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userCfg.wbEn =
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(CVA6Cfg.DCacheType == config_pkg::HPDCACHE_WB) ||
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(CVA6Cfg.DCacheType == config_pkg::HPDCACHE_WT_WB);
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userCfg.lowLatency = 1'b1;
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return userCfg;
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endfunction
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core/cache_subsystem/hpdcache

Submodule hpdcache updated 102 files

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