hpdcache: update submodule

Author: cfuguet

.gitlab-ci/scripts/report_benchmark.py

@@ -23,9 +23,9 @@
     "dhrystone_single": 22256,
     "coremark_dual": 981777,
     "coremark_single": 1294524,
-    "dhrystone_cv32a65x": 28822,
+    "dhrystone_cv32a65x": 28823,
     "dhrystone_cv32a60x": 36629,
-}
+
 
 for arg in sys.argv[1:]:
     if "--dhrystone" in arg or "--coremark" in arg:

core/cache_subsystem/cva6_hpdcache_subsystem.sv

@@ -211,6 +211,8 @@ module cva6_hpdcache_subsystem
     userCfg.mshrSetsPerRam = CVA6Cfg.NrLoadBufEntries < 16 ? 1 : CVA6Cfg.NrLoadBufEntries / 2;
     userCfg.mshrRamByteEnable = 1'b1;
     userCfg.mshrUseRegbank = (CVA6Cfg.NrLoadBufEntries < 16);
+    /*FIXME we should add additional CVA6 config parameters (cbufEntries)*/
+    userCfg.cbufEntries = 4;
     userCfg.refillCoreRspFeedthrough = 1'b1;
     userCfg.refillFifoDepth = 2 * (CVA6Cfg.DCACHE_LINE_WIDTH / CVA6Cfg.AxiDataWidth);
     userCfg.wbufDirEntries = CVA6Cfg.WtDcacheWbufDepth;
@@ -231,6 +233,7 @@ module cva6_hpdcache_subsystem
     userCfg.wbEn =
         (CVA6Cfg.DCacheType == config_pkg::HPDCACHE_WB) ||
         (CVA6Cfg.DCacheType == config_pkg::HPDCACHE_WT_WB);
+    userCfg.lowLatency = 1'b1;
     return userCfg;
   endfunction
 

core/cache_subsystem/cva6_hpdcache_subsystem_axi_arbiter.sv

@@ -278,7 +278,9 @@ module cva6_hpdcache_subsystem_axi_arbiter
 
       .mem_req_read_ready_i(mem_req_read_ready_arb),
       .mem_req_read_valid_o(mem_req_read_valid_arb),
-      .mem_req_read_o      (mem_req_read_arb)
+      .mem_req_read_o      (mem_req_read_arb),
+
+      .gnt_index_o()
   );
   //  }}}