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Data Buffer Validation Issue #67

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Merged
merged 1 commit into from
Feb 28, 2025
Merged

Data Buffer Validation Issue #67

merged 1 commit into from
Feb 28, 2025

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chaoqun-liang
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r_dp_valid_i needs to be checked before shifting data to prevent unintended behavior.

Root Cause:
src_prot may retain its value from the previous data movement. When using AXI Stream as src_prot, whether it retains the previous value depends on the capacity of the stream FIFO (NumAxInFlight) and the number of entries used during the last data movement. As a result, src_prot can remain unchanged.

Then if data is shifted into the buffer without verifying r_dp_valid_i, it can cause an unintended state where the data buffer is no longer empty. This will trigger unintended behavior at the write end of the buffer.

  • Simulated and validated in QuestaSim
  • Tested and confirmed on FPGA

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Co-authored-by: Chaoqun Liang <chaoqun.liang@unibo.it>
@thommythomaso thommythomaso merged commit d77382f into master Feb 28, 2025
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@thommythomaso thommythomaso deleted the cl/rdmux branch February 28, 2025 08:42
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2 participants