Fix bad offsets

[usbalbin]

Found out that the offset for setting the pull up/down resistor is wrong during #52

[astapleton]

Good catch! This looks like it comes from #28 where we updated to the new PAC with offsets baked in to the PAC calls. Can you do a pass over all the GPIO register accesses? It looks like the mode register accesses use the old bit shift logic, that could be updated to the PAC calls instead, avoiding the offset calculations. And there could be more.

[usbalbin]

Here is a branch with the defmt changes, extra test and the fix https://github.com/stm32-rs/stm32h5xx-hal/compare/master...usbalbin:tests-w-defmt?expand=1 not sure what happened to the history, must have messed up some rebase. Anyways, I have to go now.

Here are the results from that branch:

 cargo test --features stm32h533,defmt --tests -- --chip stm32h533RETx
   Compiling stm32h5xx-hal v0.0.0 (/home/albin/stm32h5xx-hal)
    Finished `test` profile [unoptimized + debuginfo] target(s) in 2.09s
     Running tests/nucleo-h533.rs (target/thumbv8m.main-none-eabihf/debug/deps/nucleo_h533-704b1c72c49078ed)
      Erasing ✔ 100% [####################] 112.00 KiB @ 664.36 KiB/s (took 0s)
  Programming ✔ 100% [####################] 106.00 KiB @  88.44 KiB/s (took 1s)                                                                                      Finished in 1.37s

running 4 tests
test tests::gpio_settings   ... Init:
afrl.afrel0: Af0
afrh.afrel8: Af0
moder.mode8: Analog
ospeedr.ospeed8: LowSpeed
otyper.ot8: PushPull
pupdr.pupd8: Some(Floating)

floating_input:
afrl.afrel0: Af0
afrh.afrel8: Af0
moder.mode8: Input
ospeedr.ospeed8: LowSpeed
otyper.ot8: PushPull
pupdr.pupd8: Some(Floating)

resistor Up:
afrl.afrel0: Af0
afrh.afrel8: Af0
moder.mode8: Input
ospeedr.ospeed8: LowSpeed
otyper.ot8: PushPull
pupdr.pupd8: Some(PullUp)

resistor Down:
afrl.afrel0: Af0
afrh.afrel8: Af0
moder.mode8: Input
ospeedr.ospeed8: LowSpeed
otyper.ot8: PushPull
pupdr.pupd8: Some(PullDown)

analog:
afrl.afrel0: Af0
afrh.afrel8: Af0
moder.mode8: Analog
ospeedr.ospeed8: LowSpeed
otyper.ot8: PushPull
pupdr.pupd8: Some(PullDown)

push_pull_output:
afrl.afrel0: Af0
afrh.afrel8: Af0
moder.mode8: Output
ospeedr.ospeed8: LowSpeed
otyper.ot8: PushPull
pupdr.pupd8: Some(PullDown)

open_drain_output:
afrl.afrel0: Af0
afrh.afrel8: Af0
moder.mode8: Output
ospeedr.ospeed8: LowSpeed
otyper.ot8: OpenDrain
pupdr.pupd8: Some(PullDown)

alternate 7:
afrl.afrel0: Af0
afrh.afrel8: Af7
moder.mode8: Alternate
ospeedr.ospeed8: LowSpeed
otyper.ot8: PushPull
pupdr.pupd8: Some(PullDown)

alternate 15:
afrl.afrel0: Af0
afrh.afrel8: Af15
moder.mode8: Alternate
ospeedr.ospeed8: LowSpeed
otyper.ot8: PushPull
pupdr.pupd8: Some(PullDown)

Speed Low:
afrl.afrel0: Af0
afrh.afrel8: Af15
moder.mode8: Alternate
ospeedr.ospeed8: LowSpeed
otyper.ot8: PushPull
pupdr.pupd8: Some(PullDown)

Speed VeryHigh:
afrl.afrel0: Af0
afrh.afrel8: Af15
moder.mode8: Alternate
ospeedr.ospeed8: VeryHighSpeed
otyper.ot8: PushPull
pupdr.pupd8: Some(PullDown)

ok
test tests::gpio_resistors  ... ok
test tests::gpio_push_pull  ... ok
test tests::gpio_open_drain ... ok

test result: ok. 4 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out; finished in 0.98s

[usbalbin]

So from what I have tested, #54 is all that is needed