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[CIR][LoweringPrepare] Wrap cir.va_arg lowered code in a cir.scope #1768

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Merged
merged 2 commits into from
Aug 7, 2025
Merged

[CIR][LoweringPrepare] Wrap cir.va_arg lowered code in a cir.scope #1768

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1b5d890
[CIR][LoweringPrepare] Wrap `cir.va_arg` lowered code in a `cir.scope`
tommymcm Jul 29, 2025
d2ae8a0
[CIR][LoweringPrepare] Refactored to move build logic out of lambda
tommymcm Jul 29, 2025
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29 changes: 22 additions & 7 deletions clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/LoweringPrepareX86CXXABI.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -129,7 +129,18 @@ mlir::Value LoweringPrepareX86CXXABI::lowerVAArgX86_64(
builder, datalayout, valist, ty, loc),
ty));

auto currentBlock = builder.getInsertionBlock();
mlir::OpBuilder::InsertPoint scopeIP;
auto scopeOp = builder.create<cir::ScopeOp>(
loc,
[&](mlir::OpBuilder &opBuilder, mlir::Type &yieldTy, mlir::Location loc) {
scopeIP = opBuilder.saveInsertionPoint();
yieldTy = op.getType();
});

mlir::Block *contBlock = scopeIP.getBlock();

mlir::Block *currentBlock = builder.createBlock(contBlock);
builder.setInsertionPointToEnd(currentBlock);

// AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of
// general purpose registers needed to pass type and num_fp to hold
Expand Down Expand Up @@ -163,7 +174,6 @@ mlir::Value LoweringPrepareX86CXXABI::lowerVAArgX86_64(
inRegs = inRegs ? builder.createAnd(inRegs, fitsInFP) : fitsInFP;
}

mlir::Block *contBlock = currentBlock->splitBlock(op);
mlir::Block *inRegBlock = builder.createBlock(contBlock);
mlir::Block *inMemBlock = builder.createBlock(contBlock);
builder.setInsertionPointToEnd(currentBlock);
Expand Down Expand Up @@ -338,14 +348,19 @@ mlir::Value LoweringPrepareX86CXXABI::lowerVAArgX86_64(
buildX86_64VAArgFromMemory(builder, datalayout, valist, ty, loc);
builder.create<BrOp>(loc, mlir::ValueRange{memAddr}, contBlock);

// Return the appropriate result.
// Yield the appropriate result.
builder.setInsertionPointToStart(contBlock);
mlir::Value res_addr = contBlock->addArgument(regAddr.getType(), loc);

return alignment
? builder.createAlignedLoad(
loc, builder.createPtrBitcast(res_addr, ty), alignment)
: builder.createLoad(loc, builder.createPtrBitcast(res_addr, ty));
mlir::Value result =
alignment
? builder.createAlignedLoad(
loc, builder.createPtrBitcast(res_addr, ty), alignment)
: builder.createLoad(loc, builder.createPtrBitcast(res_addr, ty));

builder.create<cir::YieldOp>(loc, result);

return scopeOp.getResult(0);
}
} // namespace

Expand Down
25 changes: 24 additions & 1 deletion clang/test/CIR/Lowering/var-arg-x86_64.c
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Original file line number Diff line number Diff line change
Expand Up @@ -47,6 +47,7 @@ double f1(int n, ...) {
// CIR: [[VASTED_VA_LIST:%.+]] = cir.cast(array_to_ptrdecay, [[VA_LIST_ALLOCA]]
// CIR: cir.va.start [[VASTED_VA_LIST]]
// CIR: [[VASTED_VA_LIST:%.+]] = cir.cast(array_to_ptrdecay, [[VA_LIST_ALLOCA]]
// CIR: [[VAARG_RESULT:%.+]] = cir.scope
// CIR: [[FP_OFFSET_P:%.+]] = cir.get_member [[VASTED_VA_LIST]][1] {name = "fp_offset"}
// CIR: [[FP_OFFSET:%.+]] = cir.load [[FP_OFFSET_P]]
// CIR: [[OFFSET_CONSTANT:%.+]] = cir.const #cir.int<160>
Expand Down Expand Up @@ -75,7 +76,9 @@ double f1(int n, ...) {
// CIR: ^[[ContBlock]]([[ARG:.+]]: !cir.ptr
// CIR: [[CASTED_ARG_P:%.+]] = cir.cast(bitcast, [[ARG]]
// CIR: [[CASTED_ARG:%.+]] = cir.load align(16) [[CASTED_ARG_P]]
// CIR: cir.store{{.*}} [[CASTED_ARG]], [[RES]]
// CIR: cir.yield [[CASTED_ARG]]
//
// CIR: cir.store{{.*}} [[VAARG_RESULT]], [[RES]]
long double f2(int n, ...) {
va_list valist;
va_start(valist, n);
Expand Down Expand Up @@ -185,3 +188,23 @@ const char *f3(va_list args) {

// ...
// CIR: cir.return

void f4(va_list args) {
for (; va_arg(args, int); );
}
// CIR-LABEL: cir.func dso_local @f4
// CIR: cir.for : cond {
// CIR: %[[VALIST:.*]] = cir.load align(8) %[[VALIST_VAR]] : !cir.ptr<!cir.ptr<!rec___va_list_tag>>, !cir.ptr<!rec___va_list_tag>
// CIR: %[[VAARG_RESULT:.*]] = cir.scope {
// ... // The contents are tested elsewhere.
// CIR: cir.yield {{.*}} : !s32i
// CIR: } : !s32i
// CIR: %[[CMP:.*]] = cir.cast(int_to_bool, %[[VAARG_RESULT]] : !s32i), !cir.bool
// CIR: cir.condition(%[[CMP]])
// CIR: } body {
// CIR: cir.yield
// CIR: } step {
// CIR: cir.yield
// CIR: }
// CIR: cir.return
// CIR: }
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